Unable to Write or read data in hyperRAM

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kmishra93
Level 1
Level 1
5 sign-ins First reply posted First question asked

I have interfaced 64MB hyperRAM (S27KS0641DPBHI020) with FPGA on board.  I am using infineon controller, I have written master to handle hyperram slave controller. I am getting expected result in simulation but not unable to read/ write data on actual hardware. 

I have successfully write and read configuration registers, but data is not getting written and read back. I have reset for 10 sec which is much more than 300 microsec and provided delay of 1 sec between registers configuration and data write and lso between data write and data read.

Please suggest proper solution. 

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4 Replies
Aadesh
Moderator
Moderator
Moderator
100 sign-ins 25 solutions authored 50 replies posted

Hello @kmishra93 ,

Could you please share the command address which you are sending while  reading/writing the data?
In order to access the memory address space the command address bit 46 needs to be '0'. Please refer to image below from the datasheet.

Aadesh_0-1706006966403.png

 

 Best Regards,

Aadesh

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Hi Aadesh,

      I am not sending any command address. I have hyperRAM controller IP which acts as slave shared by infineon, I wrote axi_master to control it. I am just configuring below registers to required value of base address to 0xh00000000 and using same address for memory write and read. I am not sending or configuring command address.

kmishra93_0-1706007856946.png

 

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Hello @Aadesh ,

    Can you guide how to set CA[46] to 0 for memory space access.

Thanks,

Krishna

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delta8
Level 1
Level 1
First reply posted Welcome!

It seems like you're facing issues with reading or writing data in HyperRAM. Ensure that your communication protocol is properly configured, and consider checking for any issues with your hardware connections. Additionally, verify that the voltage levels and timing parameters meet HyperRAM specifications. If the problem persists, consult the datasheet for troubleshooting guidance. Delta 8 is not directly related to HyperRAM issues, but it's essential to focus on technical aspects for resolution.

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