Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

Hyper RAM Forum Discussions

MAO
Level 4
Level 4
25 replies posted 50 questions asked First solution authored

When I set up HyperBUS, it writes an indeterminate value (this is usually the case in the first generation as well).
When I write after this, I cannot write correctly.
I can't write directly in the debugger.
If I do a 16-byte write, for example, it appears that I can write from the middle.
When 16 characters are written as shown below, it seems to be able to write properly from the 5th character.
W: "HE2CT-1200A-3Z", R: "T-1200A-3Z
R: "T-1200A-3Z "

For example.
16 characters "HE2CT-1200A-3Z " should be
0x4000'0000~ and write
0x4000'0000~ is read in
If the character that should be in 0x4000'0004~ is written as
T-1200A-3Z" can be read.
This is the phenomenon.

If we follow the attached PCN and migration guidance document from Infineon, we need to set the latency to 7 clocks, but
RZ/A2M's latency clock setting seems to be only 5 or 6 clocks.

 In the migration of HyperRAM GEN2.0 to the current RZ/A2M MPU (R7S921053VCBG), the clock cycle difference seems to have a particular impact.
The clock cycle difference seems to have a particular impact.
Is it possible to apply RZ/A2M vs HyperRAM Gen.2 itself?

Translated with DeepL

0 Likes
4 Replies
DesaiShubham
Moderator
Moderator
Moderator
50 sign-ins 25 replies posted First like received

Hi @MAO ,

 

>Could you please provide Write waveform?

>Could you please share the power-on and power-down waveforms?

> Could you please let us know if you are compliant with the tVCS spec?

>Please mention the number of chips which have same issue

>From the beginning you are facing this issue on chip or chip was working fine at initial

 

Thanks,

Shubham

0 Likes

Yes, sir.
I will check with the customer.

0 Likes
MAO
Level 4
Level 4
25 replies posted 50 questions asked First solution authored

We will contact you when we receive a response from the customer.
As for the waveform, we will try to get it if it is dirty as shown below.

Please let us know the waveforms of Write and Write.
Can you tell us the power-on and power-down waveforms?
→From the customer
We are very sorry, but we do not have an oscilloscope/probe with the appropriate capability to observe the HyperBus.
We only have a passive type, with a capacitance of over 10pF, and in the past, when we tried, the high-frequency component was greatly attenuated and we could not trigger the device.
Should I take an observation image of the signal waveform, even though it will be very difficult to judge whether the waveform is dirty or not?


Should we take an observation image?
→From the customer
We believe that it is compliant with the tVCS specifications, because if the initial operation of the tVCS exceeded 150us, it would be a problem even for the first generation products.


Please tell us the number of chips that have the same problem. You say multiple chips, but could you please tell us the specific number of chips?
→I am sure there are two of them.


Was this problem present from the beginning, or did it work correctly in the beginning?
→In the first generation (S27KS0641DPBHI020), 300 mass-produced prototypes were manufactured.
The first generation (S27KS0641DPBHI020) was in normal operation and we continued to use it.
However, PCN received a notice from the manufacturer that the
PCN was contacted by the manufacturer and requested to migrate to the second generation (S27KS0642GABHV020).
We have tested the operation of two prototype units by replacing them with the new ones.
This problem is occurring


0 Likes
DesaiShubham
Moderator
Moderator
Moderator
50 sign-ins 25 replies posted First like received

Hi @MAO,

 

Could you please mention on which frequency range configuration is set?

 

Thanks,

Shubham 

0 Likes