Hyper RAM Forum Discussions

[jwdonal]

There is an error in the DCARS footprint in the S70KS1282GABHB03 datasheet.

https://www.infineon.com/cms/en/search.html#!term=S70KS1282GABHB03&view=all

https://www.infineon.com/dgdl/Infineon-S70KL1282_S70KS1282_3.0_V_1.8_V_128_Mb_(16_MB)_HYPERBUS_INTER...

Section 12.2, Figure 37. The *DCARS*-capable part should have signals PSC and PSC# on pins B5 and C5, respectively. Those signals are not shown.

Can you please confirm that the footprint is wrong so that we can proceed forward with our board fabrication?

In the past we have used the 64Mbit DCARS-capable part which has the correct DCARS footprint pinout shown with the PSC/PSC# signals. We just want to make certain that the footprint is in error and that the PSC/PSC# pins are where we think they are.

[SDESA]

Hi @jwdonal ,

Thanks for pointing out the issue. We will review this with internal team.
We will provide the updates soon.

Thanks,
Shubham

[SDESA · Accepted solution]

Hi @jwdonal ,

We have noticed  error in datasheet. PSC and PSC# should be on pins B5 and C5, respectively.

We will update the datasheet as early as possible and you can go ahead with  board fabrication.

Thanks,
Shubham