Hyper Flash Forum Discussions
你好,
我们将数据backdoor到s26kl512s这个hyperflash中,然后控制ospi controller来进行读flash。在读操作之前,通过ospi
controller对flash进行复位——将flash的RESETNeg拉低,经过一段时间后释放复位,将RESETNeg拉高。然后配置flash进行读操作,但读到的不是期望值,是’hff。
在debug过程中,发现当RESETNeg为低时,flash model中的reseted信号会被拉低;当RESETNeg为高的时候,reseted还是低。但在model中,当reseted为高时,才会对ospi发过来的指令和地址进行采样,所以ospi发的指令和地址根本进不到flash model中。
我们还发现在驱动reseted信号的逻辑中,有一个条件信号(RESETNeg_in)没有加入到always @后面的敏感列表里,如下图所示:
在仿真中我们发现,当RESETNeg由0跳变到1时,程序并没有执行下图红框中的分支。
随后,我们将RESETNeg_in信号加入到always @后面的敏感列表中,然后进行相同的仿真,这次仿真成功,从波形上看,在reset释放之后,reseted被拉高。
想问一下:
1.
这是否是这个model的一个bug?
2.
如果不是的话,那如何配置能避免上述读取失败的问题?
期待回复
Show LessDo you know HyperBus Memory solution provides an optimum high-performance memory subsystem with 70% fewer pins and a 77% smaller footprint compared to existing SDRAM and Quad SPI solutions?
Do you know HyperBus Interface is fully compliant with the JEDEC xSPI standard?
Please refer the following content to know more about our HyperBus Memory solutions and let’s discuss about it in this forum post.
- Meeting New NOR Memory Design Requirements with Cypress’ HyperBusTM Interface and Synopsys DesignWare® IP Whitepaper: https://www.cypress.com/file/468291/download
- HyperBus Overview Video: https://www.cypress.com/video-library/Memory/hyperbus-overview/307571
- HyperBus Memory Products: https://www.cypress.com/products/hyperbus-memory
- Semper Flash: https://www.cypress.com/products/semper-nor-flash-memory
need to download spansion_tc_pkg for s26kl512s
AM29DL161DB90EF Is there a replacement or cross?
Thank you
David
Does CYPRESS have this kind of Read-While-Write (RWW) feature flash ? https://www.macronix.com/en-us/about/news/Pages/Macronix-Read-While-Write-(RWW)-Flash-Now-Adopted-by-Renesas%E2%80%99-Automotive-Instrument-Cluster-RH850D1M1A-MCU.aspx
Show LessHi
We're using S27KS0641DPBHV020 and S26KS256SDPBHV020 in our design and wanted to ask if Cypress provide symbols and footprints for these devices for OrCad. Thanks.
Moazam
Show LessHi. cypress
in flash roadmap, there has S28HS02GT product, and I also check the dailed PN is S28HS02GTGABHM050, but I can't find any datasheet in website, whether do you provide it to me(flance.fang@weikeng.com.cn)?
thanks
flance fang
Show LessHello,
I will use a HyperFlash memory from S26KL series at 100MHz clock rate (becose of my 3V3 power supply).
What are the impedance maching requirements ?
thank you,
PAM
Show LessHello,
[Question]
Is Pull-up of DQ / RWDS required?
[Background]
In P.25 [7. Interface States] of the following materials, it is stated that DQ / RWDS is in High-Z state during Cold / Warm Reset or Standby.
https://www.cypress.com/file/213356/download
I think this requires the Master MCU to place the bidirectional pins in the High-Z state.
In other words, since Hyper Flash and MCU are in High-Z state with each other, I think it is necessary to prevent latch-up due to shoot-through current.
In order to prevent this, it is the recognition that pull-up must be attached to the signal line.
However, when I looked at the schematic of the reference board (IMXRT1050-EVK) below, there was no external pullup.
https://www.nxp.com/docs/en/nxp/application-notes/AN12239.pdf
Is Pull-up unnecessary?
Best regards,
Takahashi
Show Less