Hyper Flash Forum Discussions
S26KL256SDPBHB02 is temperature grade of B(-40 to +105).
Does this specification mean absolute maximum range of Tj?
We are evaluating some Hyperflash devices for our upcoming product. I want to understand if you have any of the Hyperflash devices supporting SFDP ?
DSP Application Engineer
Analog DevicesShow Less
I try to use password protection on S26KL512S.
My first parameter sector is locked (4Ko size) but I can't unlock it.
After sending unlocking command the other command all return 0. I have no access to hardware PIN.
I have some questions :
1) what is the exact sequence to program Paswword?
- entry Password ASO
- Send 64b Password
- Command SetExit
or do I need to send each password's word in a sequence (inside entry and exit command) ?
2) After some attempts to program new Password the actual Password is 0. (It is also the same value I read usinf password read command). The PPB Bit Lock is clear ('1') I have not set It during my test in case of command failure.
Can someone send me the exact command to unlock this sector (at 0 address)?
in S26KL-S/S26KS-S devices, Can DCARS function be disabled by software?
What happens if PSC and PSC# pins are left open circuit?Show Less
We are new to HyperFlash erasing and programming. Therefore we are looking for sample code on how to erase and program HyperFlash using Octo-SPI in an STM32H7A3 processor and HAL Code. We use the ARM Keil Compiler and ULINK Pro programmer to flash the code. Does anybody have sample code we could have a look into or even a complete driver how to program and erase this chip with Octo-SPI?
Any help is very much appreciated!
BR GaSuShow Less
Is there any document with commands to reset and erase bulk and erase sectors of flash device inside of S71KL512SC0
we recently bought S26HL01GTFPBHB020 chip to use as flash for our controller. It supports both normal SPI and Hyperbus.
How to check the default communication interface?
I cant find the command sheet for Read/Write operation. How to read the ID from this Hyperflash to verify the communication?
Can a pullup be connected to pin A3 on S26KS512S… to allow backwards compatibility with a similar memory?
Section 15 of the S26KS512S HyperFlash datasheet notes, “Changed 24-Ball FBGA package pin A3 to DNU”, under “Description of Change” for Rev I and refers to an ECN 5844610.
Is ECN 5844610 available for review?
I would appreciate recommendations on which pins should have resistors in line that could be left unpopulated when the pin is DNU or RFU.
I would also appreciate recommendations on which pins should have resistors to power or ground that could be left unpopulated when not used or populated when needed to allow alternative memories and future proof the design?
i am using S34ML01G100TFI003 flash for my FPGA board, now its discontinued and looking for a replacement.
any recommendations, something with same pins and chip size.
Thank youShow Less
we want to supply the S26KL512SDABHI020 with 3.3V and operate it with 100MHz. The length matching of the lines fit to the guidline. We have only 50% running at 100MHz with 10 prototypes. They are also not temperature stable. The bus signals look good from a measurement standpoint.
1) Are the 100MHz at 3.3V already at the limit of the specification?
2) What does the code DA=100MHz in the order number mean?
3) Are there any special features to be considered?
Thanks and Best Regards,