Hyper Flash Forum Discussions
Hi!
I am using the multichip S76HL512TC0BHB000 (HyperRam + HyperFlash) which is based on the HyperFlash S26HL512T.
Using a STM32 MCU and the HAL-API, I am struggling a lot in order to reading flash-ID or StatusReg. I am basically just reading "0xFF:s" whatever I try..
Is there any example available?
Show LessHi guys,
I asked Maximum Junction Temperature to this community about S29AL008TFN010.
However I could not clear one thing, so hope someone answer to my question as folllowing.
Question:
In the datasheet, Section 13, Operating Ranges, it is listed as
Ambient Temperature : -40°C to 125°C,
I think the junction temperature of an IC operating in an ambient temperature of 125°C is higher than 125°C. Is the maximum junction temperature at which the IC can operate also 125°C?
Is the maximum junction temperature at which the IC can operate also 125°C?
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We are looking for a Hyper flash for the IMXRT106SDVL6B MCU from NXP. The suggested part is IS26KL256S-DABLI00 Hyper flash from ISSI which is obsolete and we are looking for an alternate part. The part mentioned below seems to match the specifications. Please confirm whether the selected part is compatible.
Hi,
I'm using the Hyperflash PN S26KS512SDGBHM030
The datasheet for this part in section 10.6.1 Power-On (Cold) Reset (POR) and in section 10.6.3 Hardware (Warm) Reset the following paragraph is present.
If POR has not been properly completed by the end of tVCS, a later transition to the Hardware Reset state will cause a transition to the Power-On Reset interface state and initiate the Cold Reset Embedded Algorithm. This ensures the device can complete a Cold Reset even if some aspect of the system Power-On voltage ramp-up causes the POR to not initiate or complete correctly.
If I translate this, to me this is saying that if a Power-On voltage ramp-up rate is such (not defined in specification) that causing the part to not finish its internal POR, that it runs during time period Tvcs, and that an additional RESET# signal assertion will be required to force the part to go through its POR routine again and then the part will work.
1. Is this interpretation correct?
2. Is another RESET# assertion required after the voltages have stabilized after the initial RESET# for this part and the system is released?
To me the sounds like their is possibly a microcontroller inside this part with a bad reset circuit or that is susceptible to certain ramp rates.
If indeed there is an issue with voltage ramp rates or if the voltage ramp-up must be monotonic then please specify what requirements are. Having the Hyperflash reset properly is essential to be ready for commands from my processor and booting the entire system reliably.
Thank you.
Brandon
Show LessIt would be great if you advise the following things. These items are not described its datasheet.
1. Technology Process
2. Manufacturing Process Flow
3. Specify Manufacturer In-Process Controls. (e.g. SPC/ Statistical Process Control)
4. Maxim Junction Temperature (I know the operating Temp, rather to want to know maximum storage temp.)
5. Thermal Resistance. (e.g :Theta JA=40℃/W, Theta JC=17 ℃/W)
6. Reliability Report and tile and data. If infineon has)
7. Qualification Test Condition/ Results
e.g.
-Temperature Cycle: 500 cycles, -65 to +150°C, 77 devices, 0 fail
-Life Test or HTRB:1008 hours, +150°C, 77 generic devices 0 fail
-Temperature Humidity Bias or HAST:96 hours, +130°C, 85% RH, 77 devices, 0 fail
-Autoclave:168 hours, +121°C, 100% RH, 15 psi, 77 devices, 0 fail)
8. Reliability Process Monitoring
Thanks!
Show LessHello,
I am working on S6J32xx and S6J33xx and I have to be able to distinguish between S26KL-S and S26HL-T models.
I can easily get device ID of S26KL-S, but Semper HyperFlash is different and I cannot make it work.
The rest of operations work well because they are compatible between S26KL-S and S26HL-T. I am using LLD which is supplied with official sample software.
Please, can you help me with that? I guess it must be something easy, but I am not finding any working example to get device ID from S26HL-T.
Thanks in advance
Show LessKindly explain, how Address =0x555 is converted into 24-bit Row address (i.e. 0xAA) and Column Address (i.e. 0x05).
Hi!
I am using the multichip HyperRAM + HyperFlash S71KL256 (based on S26KL256) for a custom application with STM32H725. I have succeeded setting up communications in memory mapped mode for both FLASH and RAM.
However, I am stuck on the programming for the FLASH. I am desperate in finding examples using the HAL API's functions like HAL_OSPI_HyperbusCmd etc..
Please, is there anything you could refer me to?
Many thanks in advance
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