Attachments are accessible only for community members.
Sep 01, 2020
01:36 PM
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Sep 01, 2020
01:36 PM
Do you know HyperBus Memory solution provides an optimum high-performance memory subsystem with 70% fewer pins and a 77% smaller footprint compared to existing SDRAM and Quad SPI solutions?
Do you know HyperBus Interface is fully compliant with the JEDEC xSPI standard?
Please refer the following content to know more about our HyperBus Memory solutions and let’s discuss about it in this forum post.
- Meeting New NOR Memory Design Requirements with Cypress’ HyperBusTM Interface and Synopsys DesignWare® IP Whitepaper: https://www.cypress.com/file/468291/download
- HyperBus Overview Video: https://www.cypress.com/video-library/Memory/hyperbus-overview/307571
- HyperBus Memory Products: https://www.cypress.com/products/hyperbus-memory
- Semper Flash: https://www.cypress.com/products/semper-nor-flash-memory
0 Replies