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Anonymous
Not applicable

In data sheet you registering "The EXPOSED PAD should not be soldered on the PCB."

   

Why did you choose packing with EXPOSED PAD?

   

If I do not solder the EXPOSED PAD still will by a contact between the EXPOSED PAD on the chip to the EXPOSED PAD in my PCB

   

What should I do if I have already EXPOSED PAD in my PCB?

   


What should I do?
 

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1 Solution
SudheeshK
Moderator
Moderator
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250 sign-ins First question asked 750 replies posted

Hello,

   

As mentioned in the datasheet of FM24CL64B, the EXPOSED PAD in DFN package is not connected to the die and it should not be soldered. Soldering the EXPOSED PAD will cause the die to be exposed to excessive heat, which can result in bit failures and margin loss. 

   

It is OK to create a land pattern on the PCB for the EXPOSED PAD. But, please ensure that the EXPOSED PAD on PCB is masked during the soldering process.

   

-Sudheesh

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Anonymous
Not applicable

Waiting for reply ASAP!

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Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

It is Sunday, so no need to push.
I would suggest you to get in contact with Cypress directly: At top of this page select "Design support -> Create a Support Case" and ask your question. You will be helped by a Cypress engineer.

   


Bob

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SudheeshK
Moderator
Moderator
Moderator
250 sign-ins First question asked 750 replies posted

Hello,

   

As mentioned in the datasheet of FM24CL64B, the EXPOSED PAD in DFN package is not connected to the die and it should not be soldered. Soldering the EXPOSED PAD will cause the die to be exposed to excessive heat, which can result in bit failures and margin loss. 

   

It is OK to create a land pattern on the PCB for the EXPOSED PAD. But, please ensure that the EXPOSED PAD on PCB is masked during the soldering process.

   

-Sudheesh

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Hello SudheeshK,

I followed the above discussion about the exposed PAD of FM24CL...  I have a similar case and I do not undertand when there is a land pattern but no soldering -> I think there is still a risk that the exposed pad contacts the land pattern during soldering -> will the DIE die then?

I intend to use the FM24CL18B in 8-pin DFN package on our new design. The usage/ writting/reading of the F-RAM will be AFTER Solder Process on the printed board assembly. We intend to use leadfree Vapor Phase Solder Process 235°C medium. I have following questions:

1) What is the Intention and Motivation for Cypress to having an exposed PAD that shall not be soldered on the PCB? I do not understand. Please explain.

2) My current judgment would be:  DO NOT Design any land pattern on the PCB (Definition of the package in the library)  -> the stencil will have no "window", no solder paste will be present -> no soldering of the exposed PAD to the PBA at all -> no risk of contact to any land pattern. Please confirm or state otherwise if CORRECT

3) Does the F-RAM Sustain Vapor Phase solderprocess leadfree with a 235°C Galden Media? (material:  PFPE)

Schnitzler R. / EME / Ingolstadt - Germany

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Hi Roland Schnitzler,

Please see the answers for your queries.

1) What is the Intention and Motivation for Cypress to having an exposed PAD that shall not be soldered on the PCB? I do not understand. Please explain.

Cypress: Standard QFN or DFN package has always been with exposed pad for thermal performance. If it was design without exposed pad, it would be a custom leadframe/package. We do not want to offer a custom QFN/DFN package with unproven manufacturability and reliability. So we have a DFN package with note says that EXPOSED PAD should not be soldered.

2) My current judgment would be:  DO NOT Design any land pattern on the PCB (Definition of the package in the library)  -> the stencil will have no "window", no solder paste will be present -> no soldering of the exposed PAD to the PBA at all -> no risk of contact to any land pattern. Please confirm or state otherwise if CORRECT

Cypress: Yes, your understanding is correct.

3) Does the F-RAM Sustain Vapor Phase solderprocess leadfree with a 235°C Galden Media? (material:  PFPE)

Cypress: Our QTP (qualification) data is based on the use of convection solder reflow ovens (and not vapor phase solder reflow ovens). So unfortunately,  we don’t have any data to answer this question.

Thanks and Regards,

Sudheesh

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