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Gate Driver ICs Forum Discussions

taewan
Level 1
First reply posted First question asked Welcome!
Level 1

Hello infineon I am Kim, a student studying in Korea.
One challenge was encountered while implementing a motor drive system.
IPTC015N10NM5 is used as a switching element and 6EDL04N02PT/DSO-28 is used as a gate driver.
pwm is normally input up to the inputs (HIN1, HIN2) of the gate driver, but if you observe the output terminals HO1 and LO1 with an oscilloscope, you can observe the non-sinusoidal output as shown in the attached picture.
Also, as a result of checking VB1 and VS1, there was nothing wrong with 15V.
I don't know which part is the problem, so I'll attach the circuit diagram.
Please help me.

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1 Solution
BandaruAkhil
Moderator
Moderator 50 sign-ins 25 replies posted 10 solutions authored
Moderator

Hi @taewan 

There is a delay between the Gate Driver Input PWM and Output PWM.

BandaruAkhil_0-1658381585461.png

BandaruAkhil_1-1658381808356.png

 

The rising edge of High side gate driver output PWM is not inline with the Input PWM but the falling edge is inline but the Low side gate driver PWM is not following the Input PWM signals.

Can you measure the below signals and share the waveforms :

1) Gate driver Input PWM

2) Gate driver Output PWM

3) Fault 

4) ITRIP

5) PWM Enable

6) RCIN 

Note :  Once the DC voltage is stabilized then measure the signals. Also ensure CRO channels should not be in Invert position.

 

Best Regards,

Akhil Kumar.

 

View solution in original post

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7 Replies
BandaruAkhil
Moderator
Moderator 50 sign-ins 25 replies posted 10 solutions authored
Moderator

Hi @taewan 

Thanks for posting on the Infineon community page.

Please clarify the below points:

1) Gate driver part number is not correct. It should be either 6EDL04N06PT or 6EDL04N02PR. 

2) Please confirm across which terminals you are measuring the below inputs and outputs. 

BandaruAkhil_0-1658235228078.png

3) pwm is normally input up to the inputs (HIN1, HIN2) of the gate driver, but if you observe the output terminals HO1 and LO1 with an oscilloscope, you can observe the non-sinusoidal output as shown in the attached picture.

- PWMs are applied for HIN1 and HIN2 but the waveforms are captured for HO1 and LO1. Can

you please confirm below signals are for two different legs or same?

BandaruAkhil_1-1658236279120.png

4) What was the switching frequency and delay observed between the Input PWM signal and Output PWM signal ?

 

Best Regards,

Akhil Kumar.

 

 

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taewan
Level 1
First reply posted First question asked Welcome!
Level 1

Hi @BandaruAkhil  Thanks for the reply.
1) As a result of checking, it is 6EDL04N06PT/DSO-28.
2) The measured output pins are HO1, LO1.
3) First I noticed that the output can be non-sinusoidal. thank you
4) Outputs on the same pin. The on/off period of the gate driver and the duty of the input PWM do not match.
5)The switching frequency of PWM is 20kHz.

I have a few more questions. As a result of referring to the datasheet of 6EDL04N06PT, I confirmed that the output of the RCIN pin was 5.2V~6.4V, but when I observed it with an oscilloscope, I found that 7.2V was output. I wonder if this could be causing the problem.
I checked the 4.4 static logic function table of the datasheet and confirmed that Vcc=15V, VBS=13V, ITRIP=0V, EN=3.3V, Fault=3.3V are output when the voltage of each pin is checked.

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BandaruAkhil
Moderator
Moderator 50 sign-ins 25 replies posted 10 solutions authored
Moderator

Hi @taewan 

Good day !!

1) Please confirm across which terminals you observed  the Input sinusoidal waveforms

BandaruAkhil_0-1658292796860.png

2) The delay seen between Input PWMs and output PWMs is too high. Apply PWM to only one 

pin and observe the respective output PWM and share the waveforms for the same.

BandaruAkhil_1-1658292891089.png

3) RCIN pin seems to be fine. RCIN pin is used to determine the reset time of the

fault condition. As soon as ITRIP threshold is exceeded the external capacitor connected to RCIN

is fully discharged. The capacitor is then recharged by the RCIN current generator when the

over-current condition is finished. As soon as RCIN voltage exceeds the rising threshold of

typical VRCIN,TH = 5.2 V, the fault condition releases and the driver returns to normal condition.

4) Share the complete schematic for better understanding.

 

Best Regards,

Akhil Kumar.

 

 

 

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taewan
Level 1
First reply posted First question asked Welcome!
Level 1

Hi @BandaruAkhil  Thanks for the reply.
I will review what you said.
I am attaching my inverter circuit for better understanding.

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BandaruAkhil
Moderator
Moderator 50 sign-ins 25 replies posted 10 solutions authored
Moderator

Hi @taewan 

Please share the below waveforms and name the labels  accordingly to the schematic

1) Apply PWM to PWM_UH

  • PWM_UH to GND (use the nearest GND for probing)
  • GATE_UH to GND (use the nearest GND for probing)
  • U_HI_G to U_HI_S

2) Apply PWM to PWM_UL

  • PWM_UL to GND (use the nearest GND for probing)
  • GATE_UL to GND (use the nearest GND for probing)
  • U_LO_G to U_LO_S

If the delay is observed between the signals, bypass the PWM and give it directly to Gate driver

and measure.

 

Best Regards,

Akhil Kumar.

 

 

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taewan
Level 1
First reply posted First question asked Welcome!
Level 1

Dear @BandaruAkhil, Thank you so much for your reply.
No delay between signals up to HIN and LIN pins was observed.
This is the requested waveform.
The LOW side HIGH side output of the gate driver does not output the duty of the input PWM at all.

High.JPG

LOW.JPG

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BandaruAkhil
Moderator
Moderator 50 sign-ins 25 replies posted 10 solutions authored
Moderator

Hi @taewan 

There is a delay between the Gate Driver Input PWM and Output PWM.

BandaruAkhil_0-1658381585461.png

BandaruAkhil_1-1658381808356.png

 

The rising edge of High side gate driver output PWM is not inline with the Input PWM but the falling edge is inline but the Low side gate driver PWM is not following the Input PWM signals.

Can you measure the below signals and share the waveforms :

1) Gate driver Input PWM

2) Gate driver Output PWM

3) Fault 

4) ITRIP

5) PWM Enable

6) RCIN 

Note :  Once the DC voltage is stabilized then measure the signals. Also ensure CRO channels should not be in Invert position.

 

Best Regards,

Akhil Kumar.

 

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