Hello

In my application I want to switch very slow because of EMI, but if an overcurrent occurs I want to turn off very fast.

Therefor I wanted to use 2 times the 1edn8550B

One is used as a standard gate driver, the second one should only trigger, if overcurrent detection goes high.

So the + Input is always connected to 3V3, the - Input is connected to the high active overcurrent detection.

So usually it should always stay on, only in case of an overcurrent it shall switch of.

Can this cause a problem for the driver, since on the output there is always transition from high to low, and also the other direction? I connected the source output of the driver with a 33k to vdd, and the sink output with a 3R3 resistor to the gate of a powermosfet.

The gate driver seems to turn off, even if the signals are in a way that it should stay turned on.

Can the Voltage on the output of the sink pin affect the behavior? Because it will go down to low, even if the Source Pin is high and also the Input says it should be high.

Thanks for help

Hi

I use a 2ED4820-EM in combination with 2 IAUC70N08S5N074 MOSFETS in a back2back common source configuration.

I have the following setup:

VBat is connected to a Power Supply with 31V / 11A.  I can switch on and off resistive load without any issues (IL =1A).

After I connected a DC-fan to channel A, the fan would start, but I couldnt stop it anymore and after that the output path is constantly on.

Attached you find the startup of the fan when connected directly to the power supply. Peak current is about 11A, once running it is using about 1A.

On a fresh restart and VBat already applied, no load connected, STDIAG reports 0x40 and CHDIAG 0x09. Which seems fine. As soon as I connect a load (in this case a 33Ohm resistor) I already can measure a correct current via SPI although I did not switch on any channel. STDIAG and CHDIAG are still 0x40 and 0x09. So it does not see the load I guess.

Now when I switch on channel A, STDIAG = 0xC0 and CHDIAG = 0x0D.

I also noticed, that even if no power (VBAT nor VDD) is present, the back2back MOSFETS are always conducting.

I suppose the 2ED4820 is still running fine. Question is, why are the MOSFETS broken? I guess they should be able to handle that amount of peak current. Or is something wrong with the Gate driver?

Cheers

Andy

Hi,

I am trying to simulate the 1EDB9275F driver chip in LTSpice using the PSpice model downloaded from the website.  It seems to work as expected, but there is one issue.

I am suppling VDDI with 12 V and the model is showing a quiescent current of 870 mA. The datasheet indicates that 870 uA would be more reasonable. 

Can you confirm that this is an error in the model and that the chip does not take this much current.

I am currently engaged in the process of designing an IGBT driver circuit using the latest Infineon IC, the 2ED1324S12P. My design reference comes from the evaluation board (EVAL-2ED1324S12PM1) provided by Infineon.

Specifically, I'm seeking insights into the calculation of R(G_ON) and R(G_OFF) – these are the gate resistances required for turning the IGBT on and off, respectively. Are there any official documents or resources that provide guidance on selecting the right values for these gate resistors individually?

Additionally, I am curious about the diode employed in conjunction with the gate resistor. Is a diode such as the 1N4001 suitable for this application?

Hi

I set up the 2EM4820 as shown in the attached picture. Is this ok? I wasnt sure, if I can connect EP to GND, since it says in the manual, it should not be used as GND but then in section 9 of the manual the EP is connected to GND.

I also would like to use PWM for controlling the load. Could this also be achieved, by toggling the Enable Pin instead of MOSONCH_A? Is it even possible to use it with PWM (app. 500 -1000Hz)?

Thanks

Andy

hello,

I am using the 6EDL7141 with an STM32 microcontroller and have several questions which I don't believe are answered in the datasheet.

First I will explain the problems I am having:

1. When VBUS voltage input is above ~7V and EN_DRV is enabled, the DVDD output shuts off. At this point the 6EDL consumes ~40mA @ 12V

2. When VBUS voltage input is above ~7V and EN_DRV is disabled (low), the DVDD is ON and at 3.3V setpoint.

3. When VBUS voltage input is a bit lower than 7V and EN_DRV is enabled, DVDD is ON and at 3.3V setpoint. 

4. The 6EDL will not reply to SPI commands.

I expect that there is some fault when EN_DRV is enabled? But why is this related to input voltage?

Questions:

1. Does SPI communication from 6EDL require that EN_DRV is on (high)?

2. Why might I be experiencing the above behavior. I have capacitance close to load and close to output of 3.3V DVDD

I have attached a schematic.

Thank you,

Alec

Bootstrap diode leakage current (ILK_DIODE) is missing in the datasheet, it is essential for the calculation of the bootstrap capacitor.

Hi,

   SDO Disable Time starts at the 0.8VDD point on the CSN rising. How do I choose the end point? According to the figure, there is a line at 0.8VDD/0.2VDD. One thing is before the line the device has already released SDO and it's high impedance. The signal SDO may charge or discharge somehow making a slow rising/falling edge. In this situation, if you take 0.2VDD/0.8VDD as end point, the tdissdo will be far longer than the rating value. In fact, it makes no sense since the device already realesed the pin, the time of rising/falling has nothing to do with the device. For another thing, there may not be a rising/falling edge.So 0.2VDD/0.8VDD may not occur.