Gate Driver ICs Forum Discussions

Hi,

I am trying to connect the infineon gate driver for high voltage GaN MOSFET and I have designed the attached Altium circuit. Can you tell me what is incorrect here and what can be done.

Thanks is advance.

Neha Agarwal

Vinp is pulse source with 3V amplitude. there is no output at OUTB.

do you see any error on simulation schematic that stops 2EDF8275 to give OUT B output?

I want to know whether the resistor used in the HIN and LIN is a pull-down resistor or resistor used for limiting the current to the input pins. (Reference EVAL-2ED1324S12PM1)

TLE9183QK电机驱动芯片，工作在正常模式（INH,SOFF,ENA 3个引脚输入3.3V高电平）

当IL1引脚输入10KHZ 50%占空比 PWM波（IH1引脚保持缺省的高电平，关闭上管），GL1为什么不输出对应的PWM波开关对应的下管，保持为低电平？检查ERR引脚输出为正常的3.3V高电平，未报错。

#TLE9183QK

Hello everyone,

I am working with the 6ED2231S12TM1 with the IMC101 in order to drive a FP75R12N2T7BPSA1.
The 6ED2231S12TM1 is rated for current +0.35A / -0.65A (source/sink).
Due to the high gate charge of the PIM I believe that I need more current.

This is the schematic I made:

I used the ZXGD3006E6Q wich is a normal push-pull gate driver.
This is connected between the 6ED and the PIM in this way:

Is this a valid way to increase the current capability of the 6ED?

Kind regards,

Marco Negrini

I had previously raised a query related to the programming of 1ED3860MC12MXUMA1. I received help from the Infineon community in the form of a sample code to help program the 1ED3860MC12MXUMA1. So, thanks for that! However, I couldn't respond back for quite some time, and that post is presently closed.

Anyway, after going through the sample code, and reading in detail the application note of 1ED3860MC12MXUMA1, I tried to program the gate driver 1ED3860MC12MXUMA1. Following were the problems I faced 

1. The RDY pin does not get permanently released and oscillates between 1 and 0. 

2. The PWM from MCU, which is always kept high, gets disturbed and sometimes gets pulled low as the RDY oscillates. 

I am sharing a PDF along with this post to elucidate my problem in detail. Request the Infineon community to help. 

Thanks!

Hi all,

I've recently designed a gate driver board using 1EDI3033AS. My reference design is from EiceDRIVER™ enhanced 1EDI302xAS/1EDI303xAS evaluation board.

While testing, on application of PWM signal, the gate pulse at the Tout pin is getting clamped to VEE2 voltage.

Can anyone help me in finding the specific reason for this? 

Thanks in advance.