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Gate Driver ICs Forum Discussions

fuqiang
Level 1
Level 1
First solution authored First reply posted First question asked

After completing the register configuration, CFGOK.USER_ OK is set to 1 and it is confirmed to be 1 by reading. But register RDYSTAT is read to be 1, that is, SEC_ RDY and PRI_ RDY is 0, CHIP_ RDY is 1. The power is checked that VCC1 is 3.3V and VCC2 is 16V. So, what are the conditions for PRI_RDY to be 1?  What are the conditions for SEC_RDY also?

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Rachel_Gao
Moderator
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Moderator
5 questions asked 50 solutions authored First like given

Hi  

When from Parameter transfer state to Normal operation, RDYSTAT.SEC_RDY= 1. In the Parameter transfer state, VCC1 ok, VCC2 ok, RDYC = 0, FLT_N = x, IN = x. In the Normal operation, VCC1 ok, VCC2 ok, RDYC = 1, FLT_N = 1, IN = x. In the operating state diagram from the datasheet, the PRI_ RDY is not used.

Best regards,

Rachel

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Rachel_Gao
Moderator
Moderator
Moderator
5 questions asked 50 solutions authored First like given

Hi  

When from Parameter transfer state to Normal operation, RDYSTAT.SEC_RDY= 1. In the Parameter transfer state, VCC1 ok, VCC2 ok, RDYC = 0, FLT_N = x, IN = x. In the Normal operation, VCC1 ok, VCC2 ok, RDYC = 1, FLT_N = 1, IN = x. In the operating state diagram from the datasheet, the PRI_ RDY is not used.

Best regards,

Rachel

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