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Hello, I'm using the Gate Driver 1ED3122MC12H for my inverter application, what is the input voltage to be used for the same? I've simulated the driver in LTSpice with 3.3, 5 and 15 Volts, and the system works for 3.3V and 5V only. Is there a reason for this?
Also, in the typical operating conditions, it was given as 3.3 V in the evaluation board for 1ED3122MC12H.
Also, in the evaluation board of 1ED3122MC12H ( AN2019-22 EVAL-1ED3122Mx12H ) The half bridge setup uses a sinking path for gate current through a resistor and a diode, as well as the clamp terminal. Would the diode and resistor path be necessary? Thanks and Regards.
Solved! Go to Solution.
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hello @asrikrishnagovi
First of all thank you for letting us know about the issue.
I had raised the issue in spice model to concern person to solve and same will be updated in the website.
please check the web site after few days you will get updated model.
till then please bare with us.
I hope this information solved your purpose.
Thanks,
Malleswararao.
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Hi @asrikrishnagovi ,
Thanks for posting question in Infineon community forum.
Q1. Hello, I'm using the Gate Driver 1ED3122MC12H for my inverter application, what is the input voltage to be used for the same? I've simulated the driver in LTSpice with 3.3, 5 and 15 Volts, and the system works for 3.3V and 5V only. Is there a reason for this?
Ans. As per data sheet, Nominal working voltage at Input side (Table-5) (Vcc) is 3.1Vdc to 15Vdc. yes this IC has wide bandwidth of VCC supply.
Q2. Also, in the typical operating conditions, it was given as 3.3 V in the evaluation board for 1ED3122MC12H.
Ans. Yes. Since nominal working voltage of U6 IC (SN74LVC2G132DCUR) is 1.65Vdc to 5.5Vdc. where same VCC1 is connected both the ICs (SN74LVC2G132DCUR & 1ED3122MC12H). Even though driver IC has more bandwidth upto 15V, but VCC1 is limited to 3.3Vdc due to operating conditions of SN74LVC2G132DCUR.
Q3. Also, in the evaluation board of 1ED3122MC12H ( AN2019-22 EVAL-1ED3122Mx12H ) The half bridge setup uses a sinking path for gate current through a resistor and a diode, as well as the clamp terminal. Would the diode and resistor path be necessary?
Ans. If your application demands (selected IGBT/MOSFET) as value of RgON & RgOFF, then that extra diode and resistor is not required,
otherwise, if you want to utilize the exact characteristics of device (selected IGBT/MOSFET), then that extra diode and resistor is required, due to only one pin is given out from internal totem pole circuit.
Thanks,
Siva.
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Thanks for your response. I have the following follow up questions:
1. Is there any specific reason the simulation might have not worked for an input voltage of 15Volts, considering ideal conditions? The LTSpice model had only 2 of these drivers in a half-bridge setup.
2. Assuming I have the same RGon and RGoff, I can use the same path for turn off and turn on, then what is the functionality of the clamp pin? Thanks and Regards
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Hi @asrikrishnagovi ,
Thanks for reply.
Q1. Is there any specific reason the simulation might have not worked for an input voltage of 15Volts, considering ideal conditions? The LTSpice model had only 2 of these drivers in a half-bridge setup.
Ans. I tried to do myself in LTspice with one channel (same for 2 channels) it is working with 15V VCC1 input (please see the below picture for reference).
can you send the test bench snap shot which you have simulated.
Q2. Assuming I have the same RGon and RGoff, I can use the same path for turn off and turn on, then what is the functionality of the clamp pin?
Ans. yes you are right. but when it comes to functionality of the clamp pin.
when you have bipolar voltages (+15V and -10V) to drive the gate, then CLAMP pin will not have more significance, because you are providing strong negative voltage to stay device in turn OFF position.
But in case if you have only unipolar supply (only +15V w.r.t. to gnd). you will apply 0V to Gate while turn off. but there is chance that gate can charge through Drain to gate capacitance while DV/DT occurs in system DC Bus, so to stay turnoff and ensure that gate will not charge in such unwanted events , this clamp pin will not allow to raise the voltage on gate and clamp the gate to 2V w.r.t to VEE.
Thanks,
Malleswararao
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In the screenshot you had attached, the voltage of the input to the driver and the pwm pulse are of the same voltage level of 15V. I've tried it with 15V input and 5v PWM pulse, and it hasn't worked. Is there a specific reason for this?
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hello @asrikrishnagovi
yes, you are right! some thing is there inside the "1ED3122MC12H " IC spice library file to look into it.
we working on it to identify and let you know ASAP.
Thanks,
Malleswararao
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hello @asrikrishnagovi
First of all thank you for letting us know about the issue.
I had raised the issue in spice model to concern person to solve and same will be updated in the website.
please check the web site after few days you will get updated model.
till then please bare with us.
I hope this information solved your purpose.
Thanks,
Malleswararao.