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Gate Driver ICs Forum Discussions

sj4034
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First reply posted First question asked Welcome!
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The data sheet has the following description

"Cycle by cycle edge-triggered shutdown logic"

What kind of function is this?

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1 Solution
Guru_Prasad
Moderator
Moderator 100 replies posted First question asked 10 likes received
Moderator

Hello 

In your case, the bootstrap capacitor connection is creating the issue

Please do follow below recommendation

1)COM connect to your previous ground.

2) Remove that bootstrap Resistor and reduce that capacitor value or you can remove both capacitor and resistor and connect the power supply directly to VB 

3)Please use IR2127 IC for your design instead of IR2110

Please let me know if you need any help

 

Thanks

Guru

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Guru_Prasad
Moderator
Moderator 100 replies posted First question asked 10 likes received
Moderator

Hello @sj4034 

Thanks for writing to Infineon community.

The  function of Cycle by cycle edge-triggered shutdown logic will be  over current protection for any converter. The  current limit is reaching(Raising edge) maximum threshold the Gate driver IC will go in shut down mode. when the current will be below threshold(falling edge) the Gate driver IC will be functioning.  Since the operation will be trigged at Raising edge/falling edge  of its limits so it is called as edge triggering and this operation will be monitored every cycle so it is been called Cycle  with latches and flipflops so overall it is called as Cycle by cycle edge-triggered shutdown logic.

Please let me know if you need any additional information

Thanks

Guru

 

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sj4034
Level 1
First reply posted First question asked Welcome!
Level 1

thank you for your reply.

1.  Where does the gate driver IC monitor the current?
      Is it a VS terminal?

2.  I attach the waveform obtained with an oscilloscope.
      ch3 is HIN and ch4 is HO.
      It looks like it is shutting down on the second pulse.
      Is this also a feature of Cycle by cycle edge-triggered shutdown logic?

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Guru_Prasad
Moderator
Moderator 100 replies posted First question asked 10 likes received
Moderator

Hello @sj4034 

Thank you for showing the issues.

I understand that in your circuit the SD pin is disabled so Cycle by cycle edge-triggered shutdown logic will not work any more.

How ever after seeing your circuit.  my observations are pointed below

1)HO pin measurement with respect what point you are taking? I could see the  falling voltage when it PWM is OFF similarly for VS and VB

2) After two pulses the  VS and VB is decaying to zero so it causing for your HO is not working. As per my under standing   it is because of bootstrap capacitor is discharging hence you are not getting H0 so please make sure to provide closed path for your bootstrap capacitor. For arranging the closed path you need to connect the COM pin to VS and make sure to measure the HO with respect to VS 

Please let me know if you need any help

Thanks 

Guru

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sj4034
Level 1
First reply posted First question asked Welcome!
Level 1

1)I measured HO respect to PGND.

2)I connected COM to VS.

    Then, the behavior became strange.

    I attach the result.

 

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Guru_Prasad
Moderator
Moderator 100 replies posted First question asked 10 likes received
Moderator

Hello 

In your case, the bootstrap capacitor connection is creating the issue

Please do follow below recommendation

1)COM connect to your previous ground.

2) Remove that bootstrap Resistor and reduce that capacitor value or you can remove both capacitor and resistor and connect the power supply directly to VB 

3)Please use IR2127 IC for your design instead of IR2110

Please let me know if you need any help

 

Thanks

Guru

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