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Gate Driver ICs Forum Discussions

MS_19060803
Level 5
50 questions asked 50 replies posted 100 sign-ins
Level 5

Hi all,

Please tell me about the 1EDF5673.

I have two questions.

 1.Does 1EDF5673 have the circuit function which is similar to the active miller clamp circuit? 

     If not, please let me know the reason the function isnt needed.

2.Is it correct that VGS is about t3(=20ns) shorter than PWM at first pulse?

    The first pulse is the light blue part below. 

MS_19060803_1-1660272248031.png

Best regards,

MS

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1 Solution
vigneshkumar
Moderator
Moderator 25 replies posted 50 sign-ins 10 solutions authored
Moderator

Hi,

1.Active miller clamp can prevent Return ON, in this case Coupling capacitor provides the negative voltage which will avoid Return ON during normal operation.

vigneshkumar_0-1660330673304.png

This driver is having special safe condition, if it detects that there is no PWM sent for more than 32us it brings the vgs down to -VDD. This operation will help to prevent the parasitic turn on .

2.Time delay t3 is intentionally given to discharge the capacitor Cgs.

Regards,

Vignesh kumar

View solution in original post

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1 Reply
vigneshkumar
Moderator
Moderator 25 replies posted 50 sign-ins 10 solutions authored
Moderator

Hi,

1.Active miller clamp can prevent Return ON, in this case Coupling capacitor provides the negative voltage which will avoid Return ON during normal operation.

vigneshkumar_0-1660330673304.png

This driver is having special safe condition, if it detects that there is no PWM sent for more than 32us it brings the vgs down to -VDD. This operation will help to prevent the parasitic turn on .

2.Time delay t3 is intentionally given to discharge the capacitor Cgs.

Regards,

Vignesh kumar

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