6EDL7141 - SPI CS question

[hewittalec]

Hi there,

On your chip, does a persistently asserterted (low) chip-select pin interfere with the state machine's ability to transceive SPI data from a master?

I have the SCS/ pin pulled low in hardware and cannot receive any SPI data from the chip (using an STM32F4 as master).

Thanks,

Alec

[SuhasBobade · Accepted solution]

Hi Alec,

Thanks for posting on the Infineon Developer Community.

The chip select (SCS) pin is an open drain pin and is internally pulled up with 200K resistor to DVDD. It is the active low pin.

Kindly refer "7.1.2 SPI Communication" section in the datasheet. 

If you get further doubt kindly write us back.

Regards,

Suhas