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Gate Driver ICs Forum Discussions

User16877
Level 1
Level 1
Dear,

1ED020I12FA2 gate driver is used my three phase inverter, which is drive FS820R08A6P2LB module. I have problem at ready output on predriver IC.

Isolated gate SPMS voltages are +12V , -12V.

Two complementary transistors boost predriver gate current.

Gate resistor is 10 ohms.

The other components are selected to recommendents in device datasheet.

The problem is ready pin goes to low when duty cycle excees 80-90%. All of supply voltages are checked. There is no UVLO situation.

3774.attach


Yellow channel is 5V MCU PWM signal.
Pink channel is predriver out, (IGBT gate emitter voltage.)
Blue channel is ready pin voltage.
Green channel is unused.
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1 Solution
Emanuel
Employee
10 solutions authored 5 solutions authored First solution authored
Employee
Hi Musta,

glad you managed to find the problem.
Have a great new year and please let us know if you need more help.

View solution in original post

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3 Replies
Emanuel
Employee
10 solutions authored 5 solutions authored First solution authored
Employee
Dear Musta,

welcome to the forum.
From the datasheet of the product:
The READY output shows the status of three internal protection features.
• UVLO of the input chip
• UVLO of the output chip after a short delay
• Internal signal transmission after a short delay


Could you show a new scope waveform with the following: OUT, VCC2, VCC1, and RDY. please trigger on RDY going down.
this should show if there is any strange behavior on the supply voltages that might trigger the gate driver to turn-off.
thank you.
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User16877
Level 1
Level 1
Dear Emanuel,

Sorry for late response,
Spikes at VCC2-VEE2 (12V, -12V) trigs UVLO protection. I revised SMPS voltage 12V, -5V there is no problem.
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Emanuel
Employee
10 solutions authored 5 solutions authored First solution authored
Employee
Hi Musta,

glad you managed to find the problem.
Have a great new year and please let us know if you need more help.
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