CLK001 [1.0.32] DAVE 3.1.8 app on its own does not seem to generate Ext Clk

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Using Relax Kit with XMC4500 F 100 pin step AA.
I have tried to get the CLK001 module to generate a 12MHz clock to no avail. [12MHz to be used for ext ADC.]
Created a simple DAVE CE with only the CLK001 module, and set the pin P0.8 to be the ext clk output. Probing this pin shows a floating signal.
I tried the three clock source options for External Clock Output (PLL, USB, and System Clock), but none gave any kind of a clock output. In each case I ran the solver, then flushed the generated code and regenerated the code, then built the code and ran it under the debugger.
The code was as generated, i.e. no changes introduced by myself.

I have attached a zip file of the minimalist CLK project.

Any clues as to why this does not work?
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Hi Jack,

The "External Oscillator Frequency" ("12MHz" in "System" UI tab) is referring to external oscillator input frequency not external output clock frequency. Hence, the expected external output clock should be 120MHz in your project attached.
Below are the possible external clock out values:
1) 120MHz, 96 MHz, 80 MHz, 72 MHz, 60 MHz, 48 MHz - in PLL Clock Option.
2) 120MHz, 96 MHz, 80 MHz, 72 MHz, 60 MHz, 48 MHz - in System Clock Option
3) 192Mhz - in USB PLL Clock Option.

You may refer to Figure 11-14 (Clock Control Unit) of "xmc4500_rm_v1+2_2012_12_" for the details.

Best regards,
Sophia
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420.attach421.attachSophia
I think you misunderstood See attached screen shots showing clearly my intent to have a 12MHz output by setting up DAVE CLK001 External Clock Output (enabled), and the appropriate pin setup.

From ...\src\DACESupport\MULTIPLEXER.c you can see the pin is set up in the ALT1 mode, meaning it is providing the clock output.

void DAVE_MUX_Init(void)
{
/* SCU Macro definitions */

/* PORT Macro definitions for IOCR_OE, IOCR_PCR & HWSEL_HW */

WR_REG(PORT0->HWSEL, PORT0_HWSEL_HW8_Msk, PORT0_HWSEL_HW8_Pos, PORT_HWSEL_SW); /* P0.8 : PORT0_HWSEL_HW8 */
WR_REG(PORT0->IOCR8, 0xb8U, PORT_IOCR_PC0_PCR_Pos, 0x11U); /*P0.8 : PORT0_IOCR8_PC8_PCR and PORT0_IOCR8_PC8_OE */
}

So what is missing? Or, why is there no clock output? [Please note that I tried all three clock options (PLL, SYS, USB) with no difference. I started with USB but I then read somewhere that this might be suppressed if not actually using USB services.] What is the simplest way of generating 12MHz o/p using DAVE?
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Hi Jack,

The simplest way of generating 12MHz external clock out is to use PLL "Prescaler Mode".

422.attach

Best regards,
Sophia
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Hi Sophia
Still confused - this seems to set up an input source for the processor clock, but I don't see how this translates to an output. I just keep missing the 'join' between setting up the system clock such as you have indicated, and the bit that configures the output I seek. Please could you provide a DAVE 3.1.8 solution for download that outputs on pin P0.8 a 12MHz that is continuous. [I need this for an external ADC IIS clock that will be the bus master. I am also using other USIC channels for SPI and UART.]
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Hi Jack,

By adding the PLL "Prescaler Mode" configuration in your existing project (CLK.zip). You are able to get the 12MHz clock out on P0.8. But it changes the system clock to 12MHz as well.


In order to keep the 120MHz system clock, you just need to change the PLL Clock Divide Value to "10" and keep the PLL "Normal Mode".


Details can be found in Figure 11-17 External Clock Selection of "xmc4500_rm_v1+2_2012_12_".

Hope it is clear to you, thanks.

Best regards,
Sophia
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