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ChRi_4015166
Level 1
Level 1
Hello,
i'm trying to transfare Data from Memory to the Shadow-Register from the CCU8, but i've never before Worked with the DMA an i dont get ist to Work...
I finally don't understand the lots of Settings an how they Work together. Is there anyone, who can explain me this a little bit?

Thanks,
Christoph
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4 Replies
ChRi_4015166
Level 1
Level 1
Ok, no Person works with Dave it seems...
I expected more from this Forum here, but seems, I've looking at an other place....
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User15589
Level 1
Level 1
First like given 5 replies posted Welcome!
Yeah! It is ridiculous. Nobody seems to take care of this forum.
I am thinking: How Infineon expects that peoples like us change from Microchip or any other microcontroller manufacturer, if nobody looks for the forums?
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jferreira
Employee
Employee
First like received 750 replies posted 500 replies posted
Hi,

Have a look at the example XMCLib\examples\XMC4800_series\DMA\DMA_PWM which you will find at http://dave.infineon.com/Libraries/XMCLib/XMC_Peripheral_Library_v2.1.18.zip

Regards,
Jesus
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ChRi_4015166
Level 1
Level 1
Hi,
now I oriantated me at the Example, but it dosn't work and i coudn't find the mistake...

#include 
#include
#include
#include "xmc_spi.h"
#include "xmc_gpio.h"

#define TICKS_PER_SECOND 1000
#define TICKS_WAIT 20


// Sys-Tick Counter
#define CORE_SysTickEn() (*((uint32_t*)0xE0001000)) = 0x40000001
#define CORE_SysTickDis() (*((uint32_t*)0xE0001000)) = 0x40000000
#define CORE_GetSysTick() (*((uint32_t*)0xE0001004))

#define SPI_MASTER_MISO P0_0
#define SPI_MASTER_MOSI P0_1
#define SPI_MASTER_SS P0_9
#define SPI_MASTER_SCLK P0_10

#define SPI_SLAVE_MISO P0_5
#define SPI_SLAVE_MOSI P1_4
#define SPI_SLAVE_SS P1_0
#define SPI_SLAVE_SCLK P1_1

#define LEDS 784
#define BUFFER_LENGTH (LEDS*2)+4
#define LEDDATABUFFER 1

#define BRIGHTNES 0x1F

#define APA102_STARTFRAME (uint32_t)0x00000000
#define APA102_STOPFRAME (uint32_t)0xFFFFFFFF


void sendAPA102(uint32_t LedData[1][4]);

XMC_USIC_CH_t *spi_master_ch = XMC_SPI1_CH1;

uint16_t buffer[BUFFER_LENGTH];

volatile bool transfer_done = false;

uint32_t LedData[LEDDATABUFFER][4] = {
{0x00,0x01,0x00,BRIGHTNES}}; //LED-Number + RGBS
uint32_t * LedData_ptr = &LedData[0][0]; //LED-Number + RGBS

XMC_DMA_CH_CONFIG_t dma_ch_config_master =
{
.src_addr = (uint32_t)&(buffer[0]),
.dst_addr = (uint32_t)&(USIC1_CH1->TBUF[0]),
.block_size = BUFFER_LENGTH,
.src_transfer_width = XMC_DMA_CH_TRANSFER_WIDTH_16,
.dst_transfer_width = XMC_DMA_CH_TRANSFER_WIDTH_16,
.src_address_count_mode = XMC_DMA_CH_ADDRESS_COUNT_MODE_INCREMENT,
.dst_address_count_mode = XMC_DMA_CH_ADDRESS_COUNT_MODE_NO_CHANGE,
.src_burst_length = XMC_DMA_CH_BURST_LENGTH_1,
.dst_burst_length = XMC_DMA_CH_BURST_LENGTH_1,
.transfer_flow = XMC_DMA_CH_TRANSFER_FLOW_M2P_DMA,
.transfer_type = XMC_DMA_CH_TRANSFER_TYPE_SINGLE_BLOCK,

.dst_handshaking = XMC_DMA_CH_DST_HANDSHAKING_HARDWARE,
.dst_peripheral_request = DMA0_PERIPHERAL_REQUEST_USIC1_SR0_0, // SR = 1, Line = 2;

.enable_interrupt = true

};








XMC_SPI_CH_CONFIG_t spi_master_config =
{
.baudrate = 5000,
.bus_mode = XMC_SPI_CH_BUS_MODE_MASTER,
.selo_inversion = XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS,
.parity_mode = XMC_USIC_CH_PARITY_MODE_NONE
};


void GPDMA0_0_IRQHandler(void)
{
transfer_done = true;
XMC_DMA_CH_ClearEventStatus(XMC_DMA0, 2, XMC_DMA_CH_EVENT_BLOCK_TRANSFER_COMPLETE);
}

/* ------------------------------------------------------------------ */
void SysTick_Handler(void)
{
static uint32_t ticks = 0;
ticks++;
if (ticks == TICKS_WAIT)
{

sendAPA102(LedData);
ticks = 0;
}
}

/* ------------------------------------------------------------------ */
uint32_t makeLedFrame(uint8_t R, uint8_t G, uint8_t B, uint8_t S) {
uint32_t LedFrame;
LedFrame = 0;
LedFrame = (LedFrame | 0x7) << 3;
LedFrame = (LedFrame | S) << 5;
LedFrame = (LedFrame | B) << 8;
LedFrame = (LedFrame | G) << 8;
LedFrame = LedFrame | R;
return(LedFrame);
}
/* ------------------------------------------------------------------ */
void sendAPA102(uint32_t LedDataToSend[LEDDATABUFFER][4]) {
uint32_t j = 2, LedFrame;
uint32_t Debug;
buffer[0] = (APA102_STARTFRAME & 0xFFFF0000)>>4;
buffer[1] = APA102_STARTFRAME & 0x0000FFFF;

for(uint32_t i = 0; i LedFrame = makeLedFrame(LedDataToSend[0][0],LedDataToSend[0][1],LedDataToSend[0][2],LedDataToSend[0][3]);
buffer = ((LedFrame & 0xFFFF0000) >> 16);
buffer[j+1] = LedFrame & 0x0000FFFF;
j=j+2;
}

buffer[BUFFER_LENGTH-2] = ((APA102_STOPFRAME & 0xFFFF0000) >> 16);
buffer[BUFFER_LENGTH-1] = APA102_STOPFRAME & 0x0000FFFF;

XMC_DMA_CH_Enable(XMC_DMA0, 2);
while (transfer_done == false);
transfer_done = false;

}
/* ------------------------------------------------------------------ */
int main(void)
{


/* Start sending periodic message */
SysTick_Config(SystemCoreClock / TICKS_PER_SECOND);


/* ------------------------------------------------------------------------- */

/* MASTER */
/* ------------------------------------------------------------------------- */
#if 1
/*Initialize and Start SPI Master*/
XMC_SPI_CH_Init(spi_master_ch, &spi_master_config);
XMC_SPI_CH_SetWordLength(spi_master_ch, 32);
XMC_SPI_CH_SetFrameLength(spi_master_ch, (32));
USIC1_CH1->PCR_SSCMode = 0x8001000F; // CS = LowActive

/*Input source selected for Master*/
XMC_SPI_CH_SetInputSource(spi_master_ch,XMC_SPI_CH_INPUT_DIN0,USIC1_C1_DX0_P0_0); // MISO

/*GPIO configuration for Master*/
XMC_GPIO_SetMode(SPI_MASTER_MOSI, XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2);
XMC_GPIO_SetMode(SPI_MASTER_SS, XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2);
XMC_GPIO_SetMode(SPI_MASTER_SCLK, XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2);
XMC_GPIO_SetMode(SPI_MASTER_MISO, XMC_GPIO_MODE_INPUT_TRISTATE);
#endif
/* ------------------------------------------------------------------------- */

/* SLAVE */
/* ------------------------------------------------------------------------- */



/* ------------------------------------------------------------------------- */

/* MASTER DMA */
/* ------------------------------------------------------------------------- */
#if 1
XMC_DMA_Init(XMC_DMA0);
XMC_DMA_CH_Init(XMC_DMA0, 2, &dma_ch_config_master);
XMC_DMA_CH_EnableEvent(XMC_DMA0, 2, XMC_DMA_CH_EVENT_BLOCK_TRANSFER_COMPLETE);

NVIC_SetPriority(GPDMA0_0_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 63, 1));

NVIC_EnableIRQ(GPDMA0_0_IRQn);





XMC_SPI_CH_EnableEvent(XMC_SPI1_CH1, XMC_SPI_CH_EVENT_TRANSMIT_BUFFER);
XMC_USIC_CH_SetInterruptNodePointer(XMC_SPI1_CH1 , XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER,1);


XMC_SPI_CH_EnableEvent(XMC_SPI1_CH1, XMC_SPI_CH_EVENT_TRANSMIT_SHIFT);


XMC_SPI_CH_TriggerServiceRequest(XMC_SPI1_CH1, 0); /* make DMA ready */
#endif
/* ------------------------------------------------------------------------- */

/* SLAVE DMA */
/* ------------------------------------------------------------------------- */

/* ------------------------------------------------------------------------- */


/* ------------------------------------------------------------------------- */
#if 1

// USIC0_CH0->DX2CR |= 0x1 << 8; // ?

XMC_SPI_CH_Start(spi_master_ch);


#endif








while(1) {

}



}


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