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In SPI_DMA example how queue works for multiple slaves in single node , unable to understand from documents of iLLD.@User16286
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- QSPI DMA
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I don't use the iLLD's so you need to figure that out on your own.
Here is an example that I captured the QSPI1 signals from a TC275 lite kit. This mirrors what you have asked for in regards to using the DMA to exchange data to three different slave devices from one QSPI master. You would need to replicate this for other QSPI's as they are independent peripherals. Once you kick the DMA to start the SPI data exchange there in no CPU intervention needed until each DMA channel (Tx/Rx) finishes. The frame for each SPI slave device is assumed to be 32bits or less so you only need to write one word per slave device into your queue (buffer). To set up your transmit queue you would do the following:
TxQueue[0] = data for Q11
TxQueue[1] = bacon for Q12
TxQueue[2] = data for Q12
TxQueue[3] = bacon for Q13
TxQueue[4] = data for Q13
Set up your DMA so the TX sends 5 words however the RX will only receive 3 words. The Bacon entries are consumed by the TXFIFO but are never transmitted on the SPI bus so this is why you have different values.
To begin the transfer simply write to the MIXENTRY of QSPI1 as the interrupts (rx and tx) are being serviced by the DMA.
Here is the plot of the QSPI sequence driven by the DMA channels. CS10 is a 32-bit data exchange, CS9 is a 16-bit data exchange with inverted SCLK, and CS8 is an 8-bit data exchange. All three use different baud rates to show a difference in the plot.
When the DMA for each channel finishes you get an interrupt which you can use to trigger your other QSPI master start its data exchange.
Here is a picture of the data from the debugger
Attached is the ADS project
Best regards,
-Chris
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Hi @Spartan2614 ,
Can you please elaborate more on your query with regards to the IDE used (Modus Toolbox or PSoC Creator) and the code example referred from the same?
Can you also please clarify about what you meant by 'single node'?
And in case of the SPI slaves, are the same connected in a daisy chain or are you using separate SPI SCB blocks for each slave?
It would also be helpful if you can mention the part number of the PSoC device you are using.
Regards
Alen
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Hi Alen , i am using Tc277 in which at QSPI0(single node) three slaves are connected and i need to implement Queue with DMA to recieve configuration and data and send response back , i didnt understand the example given finding the Queue Implementation.
i am using Aurix IDE example is SPI_DMA_1_KIT_TC275_LK , each slave has its own dedicated Chip select line
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You will need to provide more explanation as to where your issue reside...
The QSPI has multiple modes of operation.
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Hi Cwunder,
Infineon Library didnot exaplianed how to implement Queue Part with help of DMA , with help of Ifx QSPI library i am able to understand how to used it for single Channel of a module but in run time switching of Channel is not clear and how Queue Part should be implement in code is not clear.
flow i want is
Module Initialization
Channel Initialization
load configuration (how and what are the rules to load this Value )
load data (how and from where this data should be loaded in point of queue Implementation)
Send data
Get response in RX FIFO
send this RX Fifo as per Queue.
and @cwunder can you please provide any link to above image documenta as image is not clear
Thanks
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You have stated you want to run a SPI master with three slave device on three different chip selects. The next step would be to determine what mode to operate the QSPI in based on the frame formats of the three slave devices you are communicating with. Based on this you would choose the mode to operate the QSPI in. Then you can setup your buffers for the DMA (with both the BACON and data).
The QSPI queue (FIFO) can hold four entries. You write the BACON and Data to the TX FIFO and you can have the DMA service the QSPI transmit and receive events.
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Thanks Cwunder again for your help and effort ,
By going through Ifx library i am clear till part you mentioned but i cant see how Queue will work in example code like how next part is loaded automatically with using of DMA. without CPU intervention.
So its something like that
lets say i have QSPI 0 and QSPI 2 active
In QSPI0 i have three slave device Q01 ,Q02,Q03 and in QSPI 2 i have two Slave devices Q21, Q22
now i have to create queue in such a away
load configuration for Q01 send data by filling TXFifo wait till you get response.
now move to next load configuration
load configuration for Q02 send data by filling TXFifo wait till you get response.
now move to next load configuration
load configuration for Q03 send data by filling TXFifo wait till you get response.
now move to next load configuration
load configuration for Q21 send data by filling TXFifo wait till you get response.
now move to next load configuration
load configuration for Q22 send data by filling TXFifo wait till you get response.
now move to next load configuration
Now again load the configuration for first QSPI slave device that is QSPI01.
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I don't use the iLLD's so you need to figure that out on your own.
Here is an example that I captured the QSPI1 signals from a TC275 lite kit. This mirrors what you have asked for in regards to using the DMA to exchange data to three different slave devices from one QSPI master. You would need to replicate this for other QSPI's as they are independent peripherals. Once you kick the DMA to start the SPI data exchange there in no CPU intervention needed until each DMA channel (Tx/Rx) finishes. The frame for each SPI slave device is assumed to be 32bits or less so you only need to write one word per slave device into your queue (buffer). To set up your transmit queue you would do the following:
TxQueue[0] = data for Q11
TxQueue[1] = bacon for Q12
TxQueue[2] = data for Q12
TxQueue[3] = bacon for Q13
TxQueue[4] = data for Q13
Set up your DMA so the TX sends 5 words however the RX will only receive 3 words. The Bacon entries are consumed by the TXFIFO but are never transmitted on the SPI bus so this is why you have different values.
To begin the transfer simply write to the MIXENTRY of QSPI1 as the interrupts (rx and tx) are being serviced by the DMA.
Here is the plot of the QSPI sequence driven by the DMA channels. CS10 is a 32-bit data exchange, CS9 is a 16-bit data exchange with inverted SCLK, and CS8 is an 8-bit data exchange. All three use different baud rates to show a difference in the plot.
When the DMA for each channel finishes you get an interrupt which you can use to trigger your other QSPI master start its data exchange.
Here is a picture of the data from the debugger
Attached is the ADS project
Best regards,
-Chris
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Respect ++ , although I lost my job 😥 but happy that community is helping