This post is for a multi- stepper motor control (up to 8 in this example) using minimum PSoC resources.   This allows for reasonable control of the PWM pulses for stepper motors across virtually all PSoC MCUs with fewer HW resources.

The architecture to accomplish this is that there is one PWM in continuous run mode with the pulse ratio required for the stepper motors.   The application turns on individual motors by defining which motor and how many pulses.  The PWM generates an ISR to count down the pulses loaded until '0'.   When the count is '0', the motor is turned off.

The example

• Turns on certain motors for specific counts. 
• It waits for all motors to stop.
• Waits for 10ms
• Turns on other motors for specific counts.
• It waits for all motors to stop.
• Waits for 10ms
• Repeat this pattern ...

I've uploaded 4 projects for the PSoC3, PSoC4, PSoC5 and PSoC6 MCUs.   These projects were targeted for popular Infineon kits and eval boards but can be easily modified to run on most HW.

The stepper motor pulse ratio is adjustable and the ON count is assigned by an API call.

This example is designed to quickly (all 4 versions took 6 hours to create and debug) create stepper motor pulses to multiple stepper motors independently.  However, I do not have certain safety functions such as emergency stops that may be required for some systems.   This project is a starting point for your applications such as a CNC machine or a 3D printer.   It's now up to YOU!!!

I support 8 stepper motor outputs because that is what would fit in one PSoC control register.   You can extend to to more ports with more sophisticated coding.

Update: 2/7/2022

These projects require PSoCs with some UDB resources.  PSoCs without UDBs but have SmartIOs should be able to support a similar architecture.

Anyone interested in converting this project to SmartIOs?

Update: 2/10/2022

No code changes.   Just updated the name of the projects to reflect the 8 channel Stepper Motor.

Update: 2/11/2022

Added an additional project 8_StepperMotor_SW_PSoC63.cyprj.Archive01 which compiles and runs on the CY8CPROTO-063-BLE eval board.

Hi,

Provided below is custom component (HX711 v0.0) for interfacing HX711 24-bit Delta Sigma ADC for load scales.

The HX711 component implements software interface to HX711 24-bit analog-to-digital converter by AVIA Semiconductor, designed for weigh scales and industrial control applications. Using this component in conjunction with external HX711 ADC, PSoC can detect small DC signals in the range of +/-20mV or +/-40mV at 10 Hz sampling rate, or +/-80 mV at 80 Hz. Component consume little to none hardware resources, and spares very little CPU clocks (0.01%). Multiple instances of the component can run asynchronously in the project.

Component features:

   Implements software interface for HX711 ADC

   Interfaces single HX711 sensor board

   Uses interrupt or polling methods

   Has selectable ADC gain

The component was tested using CY8KIT-059 PSoC5 prototyping kit and CY8KIT-042 PSoC4 Pioneer Kit. Demo projects are provided.

Attached archive contains component library, component datasheet and demo projects for PSoC5 and PSoC4. Please read installation instructions in the readme.txt.

The component provided as-is, no liabilities. It is free to use and modify.

/odissey1

P.S. Demo projects use optional annotation components (which are also provided here in Support_libs.zip):

   PSoC Annotation Library: PSoC Annotation Library v1.0

   KIT-042 annotation stub: KIT-042: annotation component for CY8CKIT-042 Pioneer Kit​

   SerialPlot library: SerialPlot: interface to real-time data charts​

   MedianFilter: MedianFilter: sliding window median filter component

   ButtonSw32: ButtonSw32: button switch debouncer component

SerialPlot open source charting tool for Linux/Windows can be downloaded here

   https://hasanyavuz.ozderya.net/?p=244

   https://bitbucket.org/hyOzd/serialplot

Figure 1. PSoC4 project schematic using HX711 component in polling mode.

Figure 2. ADC raw data are being conditioned by the MedianFiler and streamed to the plotting software using SerialPlot custom components.

Figure 3. Load Cell response on 1-cent coin load/unload using SerialPlot software (program configuration Settings.ini is attached). Red line - ADC raw data, Blue line - ADC data after median filter.

Figure 4. Project annotation using KIT-042 stub and PSoC Annotation Library.

Message was edited by: odissey1 (4/4/2020)

Files updated: HX711_v0_0_B.pdf and HX711_lib.zip. The component datasheet was revised; the previous version incorrectly described the ADC gain and clock setting. Component library (HX711_lib.zip) has been updated to include latest datasheet. The component itself has not been modified.

Overview

The purpose of this code example is to show the users how they can handle the different sector architecture types in Infineon serial NOR flash devices.

Requirements

Tool: PSoC® Creator™ 4.4

Programming Language: C (Arm® GCC 5.4.1)

Related Hardware: S25FS512S SPI NOR flash memory, PSoC 6 BLE Pioneer Kit

Software and Driver: Infineon Low Level Driver for SPI Flash

Hardware Setup 

This example requires the PSoC 6 MCU’s V_DD  supply voltage to be set to 1.8V, since the FS-S NOR flash device family works at 1.8V power supply.

Software Setup

This example requires a serial terminal emulator such as PuTTY or Tera Term. Tera Term was used in this example.

Operation

Refer to KBA233140 Hybrid sector architecture of Infineon FL/FS-S serial NOR flash devices to get a better understanding of sector architecture.

The default configuration of the S25FS-S device can be determined by reading the third bit of Non-Volatile Configuration Register 3. The default value of CR3NV[3] bit is 0 indicating hybrid sector architecture. When the device is in hybrid sector architecture mode, the Parameter 4 KB-Sector Erase command (P4E 20h) is used to erase the 4-KB parameter sectors. If Sector Erase command (SE D8h) is applied on the 4-KB parameter sector, it is not affected by the erase. The CR3NV[3] bit is user programmable and can be set to 1 to change the device configuration to uniform sector architecture mode. However, this can be done only once as the bit is One Time Programmable (OTP). When the device is in uniform sector architecture mode, the overlay of the 4-KB parameter sectors is removed and all the sectors in the device are of uniform size (256KB). In this mode, the Sector Erase (SE D8h) command should be used to erase each individual sector and the Parameter 4 KB-Sector Erase command (P4E 20h) does not have any effect on the uniform sectors.

In this code example we have chosen the S25FS512S SPI NOR flash and interfaced it with PSoC 6 using SPI protocol.

Steps performed in the example:

1. Initialize UART and SPI
2. Read Device ID to make sure HW connections are okay
3. Read 5 bytes from the starting address (0x000000). By default, the 4-KB parameter sectors are overlaid at the bottom location
4. Program 5 bytes at starting location (0x000000)
5. Read 5 bytes from starting location to confirm
6. Erase first sector with P4E (0x20) command
7. Read 5 bytes from starting location to confirm (erase is successful)
8. Read CR3NV register
9. If CR3NV[3] bit is 0 (device is in hybrid sector architecture mode)
   1. Program 5 bytes at starting location
   2. Read 5 bytes from starting location to confirm
   3. Erase first sector with SE (0xD8) command
   4. Read 5 bytes from starting location to confirm (erase is not performed on parameter sector)
   5. Program CR3NV[3] bit to 1 (change device configuration to uniform sector architecture mode)
   6. Read CR3NV register to confirm
   7. Erase first sector with SE (0xD8) command again
   8. Read 5 bytes from the starting location to confirm (erase is successful)
10. Else if CR3NV[3] bit is 1 (device is already in uniform sector architecture mode)
    1. Print that device is in uniform sector architecture mode

Design and Implementation

Connections:

PSoC Creator Schematic:

Note: The Slave Select (SS) pin of the SPI block (SPIM_Flash) was disabled. The same pin (P12[3]) was used as a GPIO (Flash_CS) in the project so that the flash CS# line can be controlled manually, as per the requirement of the Infineon sLLD. 

Expected Output:

When the example is executed on a fresh S25FS512S NOR flash device (CR3NV[3] = 0)

When the example is re-executed on the same device (CR3NV[3] = 1)

This project demonstrates Envelope Detection using a Hilbert transformer method.

The amplitude modulated sinusoidal carrier signal is sampled by DelSig_ADC, digitally processed to extract the AM envelope and outputted using VDAC8. 

The envelope extraction is done using the Hilbert transformer method, utilizing the Filter component. Both channels of the Filter are preset with custom coefficients  to form 63-point Hilbert band-pass filter, (0.1 to 0.9) x (Fs / 2), producing
analytical (vector) signal from the ADC data. Both channels are identical, except that Channel_A has added Hilbert phase +45 deg, and Channel_B has added phase of -45 deg, producing orthogonal vector (x,y), which magnitude (length) is proportional  to the AM envelope amplitude.

The Filter coefficients are calculated using IowaHills Hilbert Filter Designer v3.0, which is available for download.

The vector length is calculated by CPU using CORDIC algorithm. To speed up processing, the procedure is restricted to only vector length (atan is ignored), and the number of iterations is reduced down to 6 (from 14), taking 58 clocks.

Optional custom Low Pass (moving average) filter can be applied to reduce step transition effects from the Hilbert filter.

The resulting envelope is sent to the VDAC8 and observed by o-scope.

Project includes optional test AM signal generator, which produces amplitude modulated signal at carrier frequency 23.4kHz. The signal generator is comprised of WaveDAC8, which is set to switch between the two Sine waves of different amplitudes, and PWM, which controls the AM period and duty cycle.

Credits:
   The Filter custom coefficients were produced using IowaHills Hilbert Filter Designer v3.0 by Iowa Hills Software LLC (IowaHills.com)

Uses:
   Project uses optional custom component MovingAverage Filter (included into the project) : MAFilter_v0_0

/odissey1

Figure 1. Project schematic. The Moving Average filter  (Filter_1) is optional. Capacitor C_13 is a KIT-059 onboard capacitor, connected to Pin 0[3].

Figure 2. Optional signal generator, producing amplitude modulated signal at carrier frequency 23.4kHz. The  WaveDAC8 is set to switch between the two Sine waves of different amplitudes. PWM controls the AM period and duty cycle.

Figure 3. Project annotation drafted using PSoC Annotation Library v1.0 . ADC is configured in differential mode. Capacitor C1 decouples signal generator from the ADC. Resistor R1 provides DC offset of 1.024V for ADC input (-). The signal generator is optional, it is not needed if an external AM signal is available.

Figure 4. IowaHills Hilbert Filter Designer v3.0. Filter coefficients for Channel  A (Phase Add +45deg) are shown at the right pane. Channel B calculations are the same, except it uses Phase Add of -45deg (not shown). 

Figure 5. Filter settings for Channel A. Filter coefficients are directly copied from the Hilbert Filter Designer. 

Figure 6. Scope traces: Blue - input signal, Yellow - envelope output, Cyan - reference. AM amplitude 1.0V, amplitude modulation 50%. Carrier frequency 23.3 kHz, AM frequency 0.583 kHz (PWM Period=40).  The output is delayed by the Filter by (63-1)/2 samples.

Figure 7. Scope traces: Blue - input signal, Yellow - envelope output, Cyan - reference. AM amplitude 1.0V, amplitude modulation 50%, AM frequency 2.33 kHz (PWM Period=10). Carrier frequency 23.3 kHz. 

Figure 8. Scope traces: Blue - input signal, Yellow - envelope output, Cyan - reference. AM amplitude 0.012V, amplitude modulation 50%, AM frequency 2.33 kHz (PWM Period=10). Carrier frequency 23.3 kHz. The output (Yellow trace) is digitally scaled up by 32 to match 8-bit scale of VDAC8.

This article introduced the Self-released ModusToolbox Offline Content Package, which improves MTB users who have Internet access issues related to github.com.

官方发布的ModusToolbox离线包内容不是最新的，这给部分开发者造成了不便。鉴于此，我维护了最新的ModusToolbox离线包，请访问下面的百度网盘链接下载（链接永久有效）：

链接: https://pan.baidu.com/s/1sFTPYZh2C8t7pzP9VSznIw 提取码: jb7j

该分享包含数个离线包：20210325版是在MTB2.2时抓取的，20210331、20210427等版本均是在MTB2.3发布后抓取的。一个显著区别是，20210325版不包含PMG1系列的Demo。

建议始终使用最新版本的离线包，即使打算使用在老版本上。因为MTB的版本和Demo之间不存在对应关系（即，你现在继续使用老版本的MTB2.2获取在线内容，如果网络正常，你也会看到New Application里面新增了PMG1系列的BSP）。

不过若你有特别的需求，比如要在MTB2.2上保持和此前一致的使用体验，或者你需要在MTB2.3上复原和MTB2.2时期一致的开发环境等，那么你也可按需使用旧的离线包。

快速开始：拷贝解压得到的整个offline目录，到你用户目录的.modustoolbox隐藏目录下（%USERPROFILE%/.modustoolbox）。然后在ModusToolbox的Project Creator / Library Manager场景中启用离线模式即可。你还可以在系统环境中添加环境变量CY_GETLIBS_OFFLINE并把其值设为"true"，这样ModusToolbox便会始终优先使用离线资源。
特别注意：你需要保证ModusToolbox完全地只使用离线资源，以免ModusToolbox因数据来源不一致而出现异常。所以请确保你已在系统环境中删除CyRemoteManifestOverride和CY_GETLIBS_CACHE_PATH这两个环境变量。

---------------------------------------------

你亦可使用生成器自己生成最新的离线包，详情请访问：
https://community.cypress.com/t5/Code-Examples/ModusToolbox-Offline-Content-Generator/m-p/270699

该生成器应用了特殊的设置，可以帮助你在一些受控的网络环境下如常访问github.com以拉取内容，生成离线包。所以如果你是遇到了网络问题而意欲使用离线包，那该生成器十分值得你尝试一下。这里指的网络问题包括：“TLS Handshake error”、“OpenSSL SSL_connect: SSL_ERROR_SYSCALL in connection to github.com:443”等。

---------------------------------------------

声明：

本离线包为自发行的免费资源，发布前已尽可能验证其可用性和稳定性。但因其未经官方渠道认证，所以无法向你提供稳定性等保证。

如果遇到问题，欢迎在下方留言反馈。

A PSoC6 CapSense UART tuner sample project is created based on ModusToolBox 2.3, project is also tested use ModusToolBox 2.4.

Please choose "ModusToolBox-->File-->Import-->ModusToolBox-->ModusToolBox App Import" option to import the unzipped "CapSense_TunerUart" project into ModusToolBox 2.3 or 2.4, then use "make getlibs" to download the extra libs from github before build the project.