Code Examples Forum Discussions
This post is for a multi- stepper motor control (up to 8 in this example) using minimum PSoC resources. This allows for reasonable control of the PWM pulses for stepper motors across virtually all PSoC MCUs with fewer HW resources.
The architecture to accomplish this is that there is one PWM in continuous run mode with the pulse ratio required for the stepper motors. The application turns on individual motors by defining which motor and how many pulses. The PWM generates an ISR to count down the pulses loaded until '0'. When the count is '0', the motor is turned off.
- Turns on certain motors for specific counts.
- It waits for all motors to stop.
- Waits for 10ms
- Turns on other motors for specific counts.
- It waits for all motors to stop.
- Waits for 10ms
- Repeat this pattern ...
I've uploaded 4 projects for the PSoC3, PSoC4, PSoC5 and PSoC6 MCUs. These projects were targeted for popular Infineon kits and eval boards but can be easily modified to run on most HW.
The stepper motor pulse ratio is adjustable and the ON count is assigned by an API call.
This example is designed to quickly (all 4 versions took 6 hours to create and debug) create stepper motor pulses to multiple stepper motors independently. However, I do not have certain safety functions such as emergency stops that may be required for some systems. This project is a starting point for your applications such as a CNC machine or a 3D printer. It's now up to YOU!!!
I support 8 stepper motor outputs because that is what would fit in one PSoC control register. You can extend to to more ports with more sophisticated coding.
These projects require PSoCs with some UDB resources. PSoCs without UDBs but have SmartIOs should be able to support a similar architecture.
Anyone interested in converting this project to SmartIOs?
No code changes. Just updated the name of the projects to reflect the 8 channel Stepper Motor.
Added an additional project 8_StepperMotor_SW_PSoC63.cyprj.Archive01 which compiles and runs on the CY8CPROTO-063-BLE eval board.
Provided below is custom component (HX711 v0.0) for interfacing HX711 24-bit Delta Sigma ADC for load scales.
The HX711 component implements software interface to HX711 24-bit analog-to-digital converter by AVIA Semiconductor, designed for weigh scales and industrial control applications. Using this component in conjunction with external HX711 ADC, PSoC can detect small DC signals in the range of +/-20mV or +/-40mV at 10 Hz sampling rate, or +/-80 mV at 80 Hz. Component consume little to none hardware resources, and spares very little CPU clocks (0.01%). Multiple instances of the component can run asynchronously in the project.
Implements software interface for HX711 ADC
Interfaces single HX711 sensor board
Uses interrupt or polling methods
Has selectable ADC gain
The component was tested using CY8KIT-059 PSoC5 prototyping kit and CY8KIT-042 PSoC4 Pioneer Kit. Demo projects are provided.
Attached archive contains component library, component datasheet and demo projects for PSoC5 and PSoC4. Please read installation instructions in the readme.txt.
The component provided as-is, no liabilities. It is free to use and modify.
P.S. Demo projects use optional annotation components (which are also provided here in Support_libs.zip):
PSoC Annotation Library: PSoC Annotation Library v1.0
KIT-042 annotation stub: KIT-042: annotation component for CY8CKIT-042 Pioneer Kit
SerialPlot library: SerialPlot: interface to real-time data charts
MedianFilter: MedianFilter: sliding window median filter component
ButtonSw32: ButtonSw32: button switch debouncer component
SerialPlot open source charting tool for Linux/Windows can be downloaded here
Figure 1. PSoC4 project schematic using HX711 component in polling mode.
Figure 2. ADC raw data are being conditioned by the MedianFiler and streamed to the plotting software using SerialPlot custom components.
Figure 3. Load Cell response on 1-cent coin load/unload using SerialPlot software (program configuration Settings.ini is attached). Red line - ADC raw data, Blue line - ADC data after median filter.
Figure 4. Project annotation using KIT-042 stub and PSoC Annotation Library.
Message was edited by: odissey1 (4/4/2020)
Files updated: HX711_v0_0_B.pdf and HX711_lib.zip. The component datasheet was revised; the previous version incorrectly described the ADC gain and clock setting. Component library (HX711_lib.zip) has been updated to include latest datasheet. The component itself has not been modified.Show Less
The purpose of this code example is to show the users how they can handle the different sector architecture types in Infineon serial NOR flash devices.
Tool: PSoC® Creator™ 4.4
Programming Language: C (Arm® GCC 5.4.1)
Software and Driver: Infineon Low Level Driver for SPI Flash
This example requires the PSoC 6 MCU’s VDD supply voltage to be set to 1.8V, since the FS-S NOR flash device family works at 1.8V power supply.
This example requires a serial terminal emulator such as PuTTY or Tera Term. Tera Term was used in this example.
Refer to KBA233140 Hybrid sector architecture of Infineon FL/FS-S serial NOR flash devices to get a better understanding of sector architecture.
The default configuration of the S25FS-S device can be determined by reading the third bit of Non-Volatile Configuration Register 3. The default value of CR3NV bit is 0 indicating hybrid sector architecture. When the device is in hybrid sector architecture mode, the Parameter 4 KB-Sector Erase command (P4E 20h) is used to erase the 4-KB parameter sectors. If Sector Erase command (SE D8h) is applied on the 4-KB parameter sector, it is not affected by the erase. The CR3NV bit is user programmable and can be set to 1 to change the device configuration to uniform sector architecture mode. However, this can be done only once as the bit is One Time Programmable (OTP). When the device is in uniform sector architecture mode, the overlay of the 4-KB parameter sectors is removed and all the sectors in the device are of uniform size (256KB). In this mode, the Sector Erase (SE D8h) command should be used to erase each individual sector and the Parameter 4 KB-Sector Erase command (P4E 20h) does not have any effect on the uniform sectors.
In this code example we have chosen the S25FS512S SPI NOR flash and interfaced it with PSoC 6 using SPI protocol.
Steps performed in the example:
- Initialize UART and SPI
- Read Device ID to make sure HW connections are okay
- Read 5 bytes from the starting address (0x000000). By default, the 4-KB parameter sectors are overlaid at the bottom location
- Program 5 bytes at starting location (0x000000)
- Read 5 bytes from starting location to confirm
- Erase first sector with P4E (0x20) command
- Read 5 bytes from starting location to confirm (erase is successful)
- Read CR3NV register
- If CR3NV bit is 0 (device is in hybrid sector architecture mode)
- Program 5 bytes at starting location
- Read 5 bytes from starting location to confirm
- Erase first sector with SE (0xD8) command
- Read 5 bytes from starting location to confirm (erase is not performed on parameter sector)
- Program CR3NV bit to 1 (change device configuration to uniform sector architecture mode)
- Read CR3NV register to confirm
- Erase first sector with SE (0xD8) command again
- Read 5 bytes from the starting location to confirm (erase is successful)
- Else if CR3NV bit is 1 (device is already in uniform sector architecture mode)
- Print that device is in uniform sector architecture mode
Design and Implementation
PSoC Creator Schematic:
Note: The Slave Select (SS) pin of the SPI block (SPIM_Flash) was disabled. The same pin (P12) was used as a GPIO (Flash_CS) in the project so that the flash CS# line can be controlled manually, as per the requirement of the Infineon sLLD.
When the example is executed on a fresh S25FS512S NOR flash device (CR3NV = 0)
When the example is re-executed on the same device (CR3NV = 1)
This project demonstrates Envelope Detection using a Hilbert transformer method.
The amplitude modulated sinusoidal carrier signal is sampled by DelSig_ADC, digitally processed to extract the AM envelope and outputted using VDAC8.
The envelope extraction is done using the Hilbert transformer method, utilizing the Filter component. Both channels of the Filter are preset with custom coefficients to form 63-point Hilbert band-pass filter, (0.1 to 0.9) x (Fs / 2), producing
analytical (vector) signal from the ADC data. Both channels are identical, except that Channel_A has added Hilbert phase +45 deg, and Channel_B has added phase of -45 deg, producing orthogonal vector (x,y), which magnitude (length) is proportional to the AM envelope amplitude.
The Filter coefficients are calculated using IowaHills Hilbert Filter Designer v3.0, which is available for download.
The vector length is calculated by CPU using CORDIC algorithm. To speed up processing, the procedure is restricted to only vector length (atan is ignored), and the number of iterations is reduced down to 6 (from 14), taking 58 clocks.
Optional custom Low Pass (moving average) filter can be applied to reduce step transition effects from the Hilbert filter.
The resulting envelope is sent to the VDAC8 and observed by o-scope.
Project includes optional test AM signal generator, which produces amplitude modulated signal at carrier frequency 23.4kHz. The signal generator is comprised of WaveDAC8, which is set to switch between the two Sine waves of different amplitudes, and PWM, which controls the AM period and duty cycle.
The Filter custom coefficients were produced using IowaHills Hilbert Filter Designer v3.0 by Iowa Hills Software LLC (IowaHills.com)
Project uses optional custom component MovingAverage Filter (included into the project) : MAFilter_v0_0
Figure 1. Project schematic. The Moving Average filter (Filter_1) is optional. Capacitor C_13 is a KIT-059 onboard capacitor, connected to Pin 0.
Figure 2. Optional signal generator, producing amplitude modulated signal at carrier frequency 23.4kHz. The WaveDAC8 is set to switch between the two Sine waves of different amplitudes. PWM controls the AM period and duty cycle.
Figure 3. Project annotation drafted using PSoC Annotation Library v1.0 . ADC is configured in differential mode. Capacitor C1 decouples signal generator from the ADC. Resistor R1 provides DC offset of 1.024V for ADC input (-). The signal generator is optional, it is not needed if an external AM signal is available.
Figure 4. IowaHills Hilbert Filter Designer v3.0. Filter coefficients for Channel A (Phase Add +45deg) are shown at the right pane. Channel B calculations are the same, except it uses Phase Add of -45deg (not shown).
Figure 5. Filter settings for Channel A. Filter coefficients are directly copied from the Hilbert Filter Designer.
Figure 6. Scope traces: Blue - input signal, Yellow - envelope output, Cyan - reference. AM amplitude 1.0V, amplitude modulation 50%. Carrier frequency 23.3 kHz, AM frequency 0.583 kHz (PWM Period=40). The output is delayed by the Filter by (63-1)/2 samples.
Figure 7. Scope traces: Blue - input signal, Yellow - envelope output, Cyan - reference. AM amplitude 1.0V, amplitude modulation 50%, AM frequency 2.33 kHz (PWM Period=10). Carrier frequency 23.3 kHz.
Figure 8. Scope traces: Blue - input signal, Yellow - envelope output, Cyan - reference. AM amplitude 0.012V, amplitude modulation 50%, AM frequency 2.33 kHz (PWM Period=10). Carrier frequency 23.3 kHz. The output (Yellow trace) is digitally scaled up by 32 to match 8-bit scale of VDAC8.
This article introduced the Self-released ModusToolbox Offline Content Package, which improves MTB users who have Internet access issues related to github.com.
链接: https://pan.baidu.com/s/1sFTPYZh2C8t7pzP9VSznIw 提取码: jb7j
快速开始：拷贝解压得到的整个offline目录，到你用户目录的.modustoolbox隐藏目录下（%USERPROFILE%/.modustoolbox）。然后在ModusToolbox的Project Creator / Library Manager场景中启用离线模式即可。你还可以在系统环境中添加环境变量CY_GETLIBS_OFFLINE并把其值设为"true"，这样ModusToolbox便会始终优先使用离线资源。
该生成器应用了特殊的设置，可以帮助你在一些受控的网络环境下如常访问github.com以拉取内容，生成离线包。所以如果你是遇到了网络问题而意欲使用离线包，那该生成器十分值得你尝试一下。这里指的网络问题包括：“TLS Handshake error”、“OpenSSL SSL_connect: SSL_ERROR_SYSCALL in connection to github.com:443”等。
I've uploaded an example project that illustrates very efficient ISR coding of 11 UART Rx ports.
It is uses a SW circular FIFO buffer for each port with threshold detection of a message size (in this case 7 bytes) and FIFO buffer overrun.
With my implementation I can achieve nearly 300KBaud for each of 11 Rx ports with the BUS_CLK @ 79.5MHz. I can achieve 100KBaud with BUS_CLK at 24MHz.
This example is intended to be a starting point for your next project for very high performance data acquisition that also supports some error detection.
- PSoC Creator 2.0 or higher.
- Many PSoCs with some minor modifications.
The project was created on a CY8CKIT-059 but can be built on virtually any PSoC5 platform.
Included is a document file explaining the project goals and a treatise on Interrupts.Show Less
I've enhanced some of my previously submitted code shares (Terminal Component - Simplifies UART or USBUART communication and GetString() function that supports input character filtering. Includes menu-driven commands. ).
I've now expanded these previous submits and placed them in a Component Library that can be easily shared with all your projects and with other users.
Here is a list of the components in the library:
- Term - Terminal (UART) replacement that can be configured as UART or USBUART types.
- String_Funcs - This is an enhancement of the GetString() function. It is easier to use.
- MenuCmds - This feature was included in the GetString demo code I shared earlier. It is now a component with some improvements.
With each of the Components, I have include at least one demo project for each component to illustrate how these components can be used.
I've also included datasheets for the Components, the demo projects and a instructional on how to install a library/component to be shared across all your projects.
All the components have the source code included for educational purposes. If you know how to write component code, you can modify it.
The components String_Funcs and MenuCmds are designed to work with ANY PSoC. (They are mostly library functions.)
The Term component currently only works with the PSoC5.
I hope everyone who download's this component will find it useful.
Message was edited by: Len Update: Added PSoC6 and PSoC4 demo code examples.
Message was edited by: Len Update: Added two more PSoC4 demo code examples. Both using the SCB_UART component and one of them with a Bootladable (-049 kit).
Message was edited by: Leonard Poma This library includes the latest version (2.3) of Term. Attached is also two demo examples of using Term.Show Less
I'm attaching a project which includes a pre-component version of a 14-bit VDAC using the dithering method to generate the extra bits of resolution beyond the inherent 8-bits provided by the Cypress VDAC8 component.
In principle it is identical to the Cypress DVDAC (12-bits max resolution) in theory of operation. It even has the same API calls.
Besides having 2 additional bits of resolution (max 14-bits), it doesn't use the DMA to operate the dithering. Instead it uses a 100% HW state machine created with UDBs. Therefore, the dithering is always in-sync to the VDAC clock and is not prone to DMA latencies. In fact, it uses 0% CPU cycles to keep it running!
Project SW Requirements:
- PSoC Creator 4.2.
- Use project DVDAC14_Demo_PSoC5
- The project supplied is designed to run on a stock CY8CKIT-059 with NO EXTERNAL components!
- The project can be modified to run on other PSoC5LP-based designs. (eg CY8CKIT-050, SparkFun boards, etc.)
- Use project DVDAC14_Demo_PSoC3
- The project supplied is designed to run on a stock CY8CKIT-030 with the addition on one small capacitor.
- The project can be modified to run on other PSoC3-based designs.
he project attached is a Demo code example that allows for user modify the DVDAC14 'component' parameters through the API calls to the included pre-component.
The Demo project uses my Term, MenuCmds and String_Funcs components to simplify the user access to the run-time features.
I have include the needed component libraries as imported into the project for your convenience.
Here is a link to my component library: Terminal-Support-Component-Library if you'd prefer to use these components as a shared resource for your other projects.
Why do this?
Because you (more specifically ... I) can. Cypress demonstrated that this is possible with their DVDAC12. I extended their idea to a HW-only solution as a learning experience and possibly a teaching tool to help show the value of the PSoCs that have UDBs. It has been my experience as an engineer that if you can move highly repetitive operations into a HW state-machine, you can achieve significant performance gains.
There might be some of you that ask: Can the DVDAC be made to support 16-bits? The short answer is yes. However, in this style of implementation you would need 32 UDB blocks. This would deplete your UDB resources. Additionally, the extra VDAC sensitivity virtually gained would be outweighed by the noise in practically any system.
I have released the DVDAC14 as a pre-component. It has about 80% of the component structures including the API calls.
I'm looking for user feedback. This includes implementation bugs if you find some. If you have some suggestions, I'd welcome the input.
Once I feel the pre-component version is stable I would consider making it into a full-fledged component.
Happy Holidays and Enjoy!Show Less
A PSoC6 CapSense UART tuner sample project is created based on ModusToolBox 2.3, project is also tested use ModusToolBox 2.4.
Please choose "ModusToolBox-->File-->Import-->ModusToolBox-->ModusToolBox App Import" option to import the unzipped "CapSense_TunerUart" project into ModusToolBox 2.3 or 2.4, then use "make getlibs" to download the extra libs from github before build the project.