Tach24: 24-channel Tachometer component

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odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

Provided below is PSoC5 Tachometer component (Tach24 v0.0), which allows continuous frequency monitoring of up to 24 parallel digital inputs.

Component uses reciprocal counters technique, providing uniform accuracy across entire operation frequency range. It was specifically designed to consume very little hardware resources per channel, leaving PSoC5 UDB Datapath available for other tasks.  To fit 24 channels into single PSoC5 the Tachometer component utilizes rarely used resources: the DMA internal 12-bit counter, and 32-bit Design Wide Timer (DWT), available to Cortex M3 microcontrollers. See attached datasheet for details.

Component features:
        * Up to 24 parallel inputs
        * Output in Hz, mHz or RPM formats
        * Doesn’t consume UDB Datapath resources
        * Optional output median filter
        * Optional timeout detection
        * Optional stall detection

The component was tested using CY8KIT-059 PSoC5 prototyping kit. Demo projects are provided. Component is not compatible with PSoC4.

Attached archive contains component library, component datasheet and demo projects for PSoC5. Please read installation instructions in the readme.txt.

The component provided as-is, no liabilities. It is free to use and modify.
/odissey1

 

Figure 1. Tachometer example of sampling 8 inputs. Tachometer is configured for Hz output format with timeout enabled. 

Tach24_x8_02a_A5b.png

 

Figure 2. Tachometer performance sampling 8 parallel inputs. Inputs are provided with individual frequencies (~200 Hz) with 0.04 Hz offset from each other: (A) raw frequency readings, (B) with median filter enabled. The spurious artifacts display accuracy of the tachometer; without the filter they are less than ±0.04 Hz (200 ppm).  

Tach24_x8_02a_200Hz_c20Hz_A.png

1 Reply
odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

Below is a typical example of the component use, testing a 12V DC fan rotation rate as a function of the applied voltage. The fan has a 3-pin connector, providing open collector tachometer output. The falling edge on this pin marks the end of the period. Since the Tach24 component samples on the rising edge of the pulse, the NOT logic element was added to invert the pulse polarity. The results are provided below. 

 

Figure 1. Project schematic. The input Pin_1 is configured for resistive Pull Up. Tachometer is configured for 2 inputs, continuously sampling fan speed both on falling and rising edges. Sampling rate is 20Hz. Small bypass capacitor 0.01u is added for noise reduction.

Tach24_1x Fan 3pin_01a_A.png

Figure 2. Tachometer frequency output for various DC power supply voltage settings: Red - falling edge; Blue - rising edge. The falling edge measurements (official fan output) appears to be much noisier, than the rising edge. The periodic noise is likely due to the pulsed nature of the motor speed control. The rising edge (Blue line) corresponds to capacitor recharging when tachometer goes HiZ, and surprisingly has no pulsations. Average fan speed stability over 20-sec interval is about +/-1 Hz. 

Fan_6-12V_01a.png

 

Figure 3. Fan tachometer output rate dependency on DC power supply voltage.

Fach24_1x Fan 3pin_Frequency vs DC.png

 

Figure 4. Fan tachometer output at DC power supply 10V. The period-to period variations are due to the pulsed nature of the DC fan motor controller, trying to keep the frequency steady. 

Fan DC10V_A.png

 

Figure 5. External connections to the CY8CKIT-059 Prototyping board created using PSoC Annotation Library v1.0. The UART output to the SerialPlot charting software is performed using USB-UART interface build into the KitProg (no external connections required). 

Tach24_1x Fan 3pin_01a_KIT-059.png

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