Solution: Use Kitprog to Program PSoC 4000 without XRES pin
Sept 12, 2019.
Several PSoC 4000 chips do not have the XRES pin. XRES is typically used by Kitprog to reset the chip to acquire a communication path for SWD.
PSoC 4000 chips (and other PSoC families) can be reset by a Power Cycle. This means, the chip Vdd must be brought to ground for an amount of time to meet the chip reset spec, while discharging any decoupling capacitors. Then, Vdd is brought up to it's desired operating voltage while also charging decoupling capacitors. Programming current is approx 3.5mA @5V (reference from Cypress).
Kitprog XRES signal is both an input and an output. For now, lets examine the output feature.
When PSOC Programmer instructs Kitprog to program a connected target device, Kitprog must first 'acquire' the target chip prior to SWD communications. (Technically, 'acquire' is part of the SWD definition). Kitprog begins the acquire sequence of events by asserting its XRES signal to logic 0 for 100us. Kitprog then sets XRES to logic 1 and performs the rest of the acquire sequence.
So, if we can use Kitprog's XRES signal to control PSoC Vdd, we can perform a Power Cycle.
The following criteria are used to perform a successful Power Cycle:
1) discharge the PSoC and decoupling capacitors within 100us
2) provide power to PSoC Vdd before Kitprog acquire sequence times out
3) meet PSoC reset timing
4) use Kitprog SWD (PSoC 4000 only supports SWD initial programming)
5) use PSoC Programmer
6) operate at +5V (+3.3V operation is described later)
7) PSoC not soldered onto pcb, or, PSoC Vdd (with it's decoupling capacitors) can be isolated from pcb circuitry
😎 PSoC SWD pins are available/accessible for connection to Kitprog
What's needed is a buffer circuit between Kitprog XRES signal and PSoC Vdd pin. This can be implemented in many different ways. One way is described below.
It's assumed the appropriate decoupling capacitors are connected to PSoC (not shown in drawing for simplification). Follow Cypress design guidelines for decoupling capacitors and powering.
The 74HC14 can also be replaced with 74HC00, 74HC32, 74HC08, just about any 74HCxx device that can be wired as a non-inverting buffer (2 invertors in series for example) with 2 (or more) outputs resistively tied together. For the 74HCxx family, use at least 2 connected in parallel to drive Vdd.
When more current is needed, possibly because the PSoC is on a pcb and there are several devices connected to the common PSoC Vdd, use 74AC14 and connect 1-upto-5 invertor outputs resistively with 11 Ohm resistors. The 6th invertor in the package is used to drive the 1-upto-5 invertors. With more than three 74AC14 invertors in parallel, you may need to dampen Vdd to control the overshoot/undershoot (beyond the scope of this discussion).
The 74HCxx or 74AC14 is powered from Vtarg signal. Both logic families can operate at 3.3V and +5v. The 74HCTxx and 74ACTxx are only spec's to operate at +5V.
Kitprog can operate from +3.3V to +5V as discussed in PSoC 5LP KIT-059 guide.
Notice the 56k Ohm pull-up resistor attached to Kitprog XRES. This is needed to prevent Kitprog from entering it's own bootloader code. If omitted, Kitprog will slowly flash its LED as an indicator it has entered bootloader mode. You can't program PSoC 4000 when this happens. So, install the 56k Ohm resistor.
For programming PSoC 4000 at +3.3V, a few modifications are needed. This is documented in Cypress KIT-059 documentation for PSoC 5LP. The most important mod is to remove diode D1 from the back-side of Kitprog. Now, connect +3.3V to Vtarg. Kitprog measures the voltage on Vtarg and adjusts its SWD signal voltages to match. The 74HCxx devices will operate at +3.3V, but might need additional invertors/gates (connected resistively in parallel as shown in circuit diagram) to achieve the necessary sink/source current.
For programming PSoC 4000 below +3.3V with Kitprog, that's an unknown. There are no voltage/programming spec's for Kitprog so it's not known if it has this capability. This is where Miniprog3 comes in handy.
What you don't expect...
When programming a blank PSoC 4000 the very first time (remember, it's blank), port pin P1.6 should be left floating, or, connected to a 36k-56k pull-up resistor to Vdd. If any other circuitry is connected, the PSoC 4000 won't come out of its reset state and it won't program (Kitprog won't be able to 'acquire' it). After PSoC 4000 has been programmed at least once, connections can be made to P1.6. Unknown why this happens.
Cypress recommends to use P1.6 as an output and DO NOT make any type of connection between P1.6 with ground. Otherwise, PSoC 4000 won't come out of reset state no matter how many times it's Power Cycled.
KEEP THE WIRES SHORT !!!
If the SWD wires connecting Kitprog to PSoC are longer than 10cm, you may have problems with SWD signal integrity. 5cm length works very well.
Be aware of what's connected to PSoC SWD pins when designing a schematic in case it has to be programmed incircuit.
Kitprog can be used to program PSoC devices needing the Power Cycle reset method. It just needs a bit of extra circuitry. Experiment with different gates/invertors as needed. No guarantee the above circuit will work for all situations, but it's a place to start. Feel free to modify the buffer circuit.
PSoC Programmer 3.28.0
Kitprog 1 running firmware 2.21 from version 1 of CY8CKIT-059
CY8C4013SXI-410 (SO-8 package, no XRES pin) datasheet
I manually set up the burning mode of cy8c4014sxi-421 according to the circuit you gave, but I can't enter the burn write mode all the time. Once I click download, I report an error. What's the reason for this?
That's a very common problem when the SWD wires are too long. 5cm works very well.
This problem also happens when there is too much capacitance (or other circuitry) connected to Vdd on pcb. All other circuitry needs to be disconnected from Vdd (or isolated with a diode) such that invertor chip only see's CY8C4014 Vdd and it's 1uF+0.1uF capacitors. You may find you need to remove the Vdd 1uF capacitor.