How to implement the TCPWM Quadrature Decoder Mode

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Janine_Y
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50 solutions authored 10 likes received 25 solutions authored

To emulate the optical encoder, the design uses two PWM peripherals. Each PWM peripheral uses a TCPWM block in the PWM mode. The output frequency of both PWMs is the same but they are 90° out of phase. The PWM peripherals are configured to generate signals at 15.625Hz.

To detect the direction of rotation, a quadrature decoder peripheral is used. This peripheral uses a TCPWM block configured as a quadrature decoder. The counter of the quadrature decoder is initialized with a midpoint counter value on an index event. The counter value increases or decreases based on the quadrature input signal. For example, a positive edge on phiA increments the counter when phiB is 0 and decrements the counter when phiB is 1. Therefore, if phiA leads phiB, the counter value of the quadrature decoder increases; if phiB leads phiA, the counter value decreases. Based on the current and the previous counter values the direction of rotation is determined. Digital output pins drive the LEDs.

See TRM 25.3.3 Quadrature Decoder Mode for more details about the Quadrature Decoder Configuration.

Test environment:

  • SDL version 7.9.0
  • IAR version 9.30

CPU Board:

  • CYTVII-B-E-1M-176-CPU Board
  • CYTVII-B-E-BB Board

Dependency:

  • CYTVII-B-E-1M-176-CPU board should be connected on CYTVII-B-E-BB board.
  • Connect a jumper wire from PWM_phiA (P2.10) output to phiA (P2.16) QuadDec input.
  • Connect a jumper wire from PWM_phiB (P10.6) output to phiB (P10.5) QuadDec input.
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