Forum Input Requested: Future Enhancements to DCmp component.

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

Now that DCmp V2.0 is released, I can now consider work on possible future enhancements.

Feature: Hysteresis

It has been suggested by another PSoC5LP enthusiast to add hysteresis to the threshold comparisons.

This would potentially allow for slow and noisy input signals to not cause as much comparison output chatter.  'Cleaner' outputs might allow for better HW and SW state machine control.

For example, you could use DCmp to create a PID controller.  This control could make decisions to control a heater element or a cooling element (like an air conditioning unit). 

Since the input would be a temperature sensor going through an ADC conversion, the input can be slow but also a bit noisy.  Too much comparison chatter on the threshold might cause the heating or cooling to rapidly get signals to turn on and off many times in a short duration.  This could cause the temperature control device to prematurely fail.

Adding sufficient hysteresis by updating the threshold after crossing it to a value above the input noise level should eliminate this effect.

Implementation Ideas

Method #1: Dual Thresholds

I could implement hysteresis by using the dual-threshold ability of the DCmp component.

For example, I could load the upper threshold into Thresh1 and the lower threshold into Thresh2. The comparison outputs would start with the upper thresholds.

As the signal crosses the upper threshold (Thresh1), DCmp would then use the lower threshold (Thresh2) for its comparison outputs.  If the signal goes below the lower threshold, the comparison outputs would now use the upper threshold.

Pros: This is the fastest hysteresis switching.   

Cons:  The design would lose the dual threshold dual-output set of comparisons.   Also, this forces DCmp into unsigned comparisons.  

Method #2: DMA Threshold Reloading

Once the input signal crosses the upper threshold, a HW signals the DMA to load the lower threshold into DCmp threshold register.  If the lower threshold is crossed, the upper threshold is loaded into the same threshold register via DMA.  

This can be done in a TD loop with the new values.

Pros: This method allows the DCmp to be used in all modes currently available since the threshold registers are reloaded.  This allows for signed comparisons.

Cons:  A DMA operation can take 8 to 10 BUS_CLK cycles to complete.  This would add latency to the hysteresis switching.   However in most cases this latency might not be a problem.  For example, if the input is being supplied by an ADC, it is highly possible that the hysteresis switching can occur before the next ADC conversion can finish.

I welcome your feedback as well as further enhancement suggestions.

 

Len
"Engineering is an Art. The Art of Compromise."
0 Likes
0 Replies