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Anonymous
Clocks
At lower temperature, transistors become faster, so edge rates would become faster.              Generally, we would expect the following parameters g... Show More
Anonymous
Clocks
Usually the CY2308 is not designed as a Fail Safe device. However, the PLL of the 2308 will not lose lock as a consequence of the oscillator being pul... Show More
Anonymous
Clocks
Usually the Propagation delay, Duty Cycle, Rise and fall time values increase with increase in temperature when you go beyond the temperature grade ra... Show More
Anonymous
Clocks
Currently Cypress does not have much buffer devices in the lower MHz range or KHz range. There is CY2302 amongst zero delay buffers that can go down t... Show More
Anonymous
Clocks
Even if there is no ripple at the supply source, you will see ripple at the Vdd pin of a Buffer when its outputs are switching. The switching outputs ... Show More
Anonymous
Clocks
Tips to minimize output-output skew are as follows: 1. Keep same length transmission lines at output. 2. Allow only one frequency output simultane... Show More
Anonymous
Clocks
The goal of any frequency synthesizer is to generate a desired output frequency based on a given input reference frequency.  However, this relationshi... Show More
Anonymous
Clocks
Making a choice to go for ZDB (Zero Delay Buffer) or NZDB (Non-Zero Delay Buffer) is fairly dependent on your application requirements.     With ZDB, ... Show More
Anonymous
Clocks
AVCMOS name/design came in from one of the companies Cypress acquired, IMI. It is another name for variable output impedance (VOI), or sometimes calle... Show More
Anonymous
Clocks
The output impedance of Cypress Zero Delay Buffers is between 20-30 ohm, unless otherwise specified in the datasheets. So its recommended to use a 20-... Show More
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Clocks

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