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Clocks Forum Discussions

Clocks Forum Discussions

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Anonymous
Clocks
It is recommended connecting the Shutdown/OE pin to VDD or GND to be on the safe side. However, a 5ms pulse for Shutdown pin should not be a problem. ... Show More
Anonymous
Clocks
Phase Jitter is used to characterize crystal oscillators and other devices where random (Gaussian distribution) jitter dominates. To obtain optimal pe... Show More
Anonymous
Clocks
Ganging outputs together to improve output-output skew or drive larger loads is the option usually considered. No problems can be expected with gangin... Show More
Anonymous
Clocks
When the reference clocks phase changes, there will be a noticeable change to the output frequency as it adjusts lock to the new clock. The output wil... Show More
Anonymous
Clocks
Normally additive jitter is not specified for the parts that are just fanout buffers with no PLL inside. Such a non zero delay buffer like CY2304NZ wo... Show More
Anonymous
Clocks
This is not recommended way of operation and is not intended either. However, if someone wants to know if the input reference clock is suddenly stoppe... Show More
Anonymous
Clocks
If you look at the jedec file for CY22150, although the format may not be obvious, it's also not complicated. Starting with the first block: L00064 ... Show More
Anonymous
Clocks
The divider bank design in the CY22150 does not guarantee any phase relationship except for the conditions mentioned in the datasheet on page 8. On po... Show More
Anonymous
Clocks
High-performance systems such as routers, switches, servers, and wireless base stations typically have high-speed serial interfaces such as 1/10 Gigab... Show More
Anonymous
Clocks
    CY23FS04 and CY23FS08 FailSafe Clock buffers devices are suitable for following applications: a. Auto clock detection during power-up. b. Auto... Show More
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Clocks

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