Clocks Forum Discussions
Check out the different devices in the new High Performance Buffer (HPB) family with ultra low-jitter non-PLL clock fanout buffers that delivers up to 10 high-frequency (up to 1.5GHz) differential outputs (LVPECL, LVDS, or CML).
Following is the link for the Parametric Search page that Provides a list of devices in Production:
Find the clock basics covered in this book in various chapters. I find this to be equivalent to what one can call as Cypress’s Bible to Clocks and Buffers! Post your questions here! The authors themselves might answer.
Following is the link to the book on Cypress Website:
Would you please kindly advise me which clock ic can suit as below application? parameter: peak - peak 0.8v 16M frequency sine wave input and 3.3v square wave output. thanks very much.Show Less
FleXO that is available with Crystal inside and some with crystal outside is now compiled in product brochure.
FleXO Technology is innovative targetted at providing a clock with reduced jitter!
Truly Industry's Most Flexible Family of Ultra Low Jitter Clock Generators as mentioned on the website!
Moreover the InstaClock software acts as a Wizard to select the appropriate jedec file by giving you choices to select from in a Step by Step approach.
If there is no jedec file meeting the requirements, look at CY22801 that is totally configurable using CyberClocks R3.21.00 software. Show Less
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