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Clocks Forum Discussions

Not applicable

There are internal weak pull-down for all the outputs. You do not need to provide pull-downs, however if you would like to provide pull downs, 5K or 10K is fine. The lower the resistor value, the strong it will pull.     




In cases where the input frequency drops below about 2 MHz, the PLL powers down and the outputs are tri-stated. In this case, the outputs are pulled low by these resistors to provide a known state.

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