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Why might the output be inverted?
A board using CY2308SXI-1 seems to be inverting the output on bypass mode (S2=1; S1 =0).
But according to the data sheet the output is only inverted from the reference clock for the -2 or -3 devices.
Note: R57 not installed
G
Solved! Go to Solution.
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Clock Buffers
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Hi @GrCa_1363456 ,
Can you provide a top marking photo of the CY2308-1 device on the board. Can you confirm it is CY2308-1 device only. As the Outputs are inverted and PLL bypass mode for 2308-2 and 2308-3, S2 = 1 and S1 = 0. So this might be the case why you are observing the inverted outputs.
Thanks,
Pradipta.
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Hi @GrCa_1363456 ,
Can you provide a top marking photo of the CY2308-1 device on the board. Can you confirm it is CY2308-1 device only. As the Outputs are inverted and PLL bypass mode for 2308-2 and 2308-3, S2 = 1 and S1 = 0. So this might be the case why you are observing the inverted outputs.
Thanks,
Pradipta.