Class D Audio Amplifier IC Forum Discussions
I've been assigned with debugging an existing 4-channel class-d amplifier based on IRS2093. Details and questions below. My idea was to put all questions in one post but if this is not desired then just let me know.
Details for the current design:
Class-D Driver: IRS2093MPbF
MOSFET: IRFB5615 (one pair per channel)
Topology: half-bridge
Fsw: 380 KHz
Dead-time: 105 ns.
Vcc: 15V
Gate stoppers: 10 Ohm
Rail voltage: just under 100V (2 x 48,5V)
Junction temperature
One of the first things I noticed is that the IRS2093 runs quite hot, too hot for my taste.
I did not do extensive testing but a quick test with opened case @ room temperature (much better cooling than worst case) gave me around 90 degrees celcius on the FLIR on the IRS2093. If I take into account the the unit will be running with the lid closed and the heatsink reaching > 70 degrees in worst case conditions then my best guess is that the IC is running too hot.
I wanted to get a better picture of the power dissipation in our design, so I decided to check the math as described in Application Note AN-1146 - Junction Temperature Estimation. I got stuck on:
7.4 PLSH: Power Dissipation of the High-side Level Shifter
PLSH = 0.4nC x fsw x VBUS x 4
All is clear except "nC". What is nC supposed to be?
I suspected the Mosfet Gate charge but that doesn't make sense as in the rest of the calculations, the gate charge is refered to as Qg.
Anyway, in order to cool down the IC, my idea was to:
- reduce Vcc from 15V to 12V. Sounds good?
- if that is not enough, reduce Fsw and/or rail voltage, find compromise between performance and reliability.
The IRFB5615 have a gate charge of 27nc, seems like this should not pose a major issue for this IC?
Feedback resistor.
The Application Note AN-1146 shows a nice table for setting Fsw, assuming a feedback resistor of 47k.
The design I'm working on seems to be loosely based on IRAUDAMP8 which uses Rfb = 100k.
Not sure why the AN says to use 47k and IRAUDAMP8 uses 100k? There's not a lot of info to work with here so I guessed I'd better ask.
Dead-time
DT is set to the highest value (105ns) which seems like quite a lot to me for IRFB5615 but I have yet to check double check if it can be reduced. My guess is that if it can be reduced, THD will drop but it won't solve the issue of the IRS2093 running so hot?
I checked the THD and that seams to be OK (all things considering), the lowest being around 0,02% @ 50W.
Output power
The amplifier was designed to do 4 x 200W @ 4 ohm or 4 x 300W @ 2 Ohm <= 1% THD, 1 KHz and in fact it does (at least for a short period). My guess is that if we run 2 channels on 4 Ohm and two channels on 2 ohm, the 2 Ohm power rating will go up considerably, well exceeding 300W per channel which seems a bit much to me? Maybe pushing the limits of these devices?
Over Current Protection
OCP is disabled in the current design and I would rather enable it if possible. However the Application note says:
2. Switching Speed
Internal over current protection has a certain time window to measure the output current. If switching
transition takes too long, the internal OCP circuitry starts monitoring voltage across the MOSFET which
induces false triggering of OCP. Less than 20nC of gate charge per output is recommended.
The IRFB5615 have a gate charge of 27nc so we can't (or shouldn't) enable OCP?
The word "recommended" leaves room for interpretation.
Final note: Please note that this is not my design and that I'm quite new to class-d amplifier design. Just trying to learn and improve the existing design. So if you have any additional suggestions I'd be more than welcome to hear them.
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Hello! , I used arduino to try to set the value of Select Power Mode Profile setting, using I2c.write(0x20, 0x00, 0x01); Successful, but all the settings are restored after the power is cut off, can I not permanently write the configuration settings of the MA12070?
1.Both AD0 and AD1 are grounded
2.code
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Clarification question:
On the Datasheet for the MA12040P Amp IC, pins 49 and 64 are designated as do not connect, as they are internally connected to 5V -- however, on the MA12040P Amp Eval board (and documented on the eval board schematic) these pins are externally connected to 5V.
We've got jumpers on our board so we can connect to 5V or not --
Can you provide guidance here? Why is the eval board connecting these pins to external 5V, despite the Datasheet guidance?
With respect to Infineon's Class D Audio Amp, P/N IRFB4020PBF, the datasheet states, "Can deliver up to 300W per channel into 8 (ohm) load in half-bridge configuration".
What is this 300 Watt limit based on?
What are the test conditions?
Assuming the thermal design is okay, can it allow for more power and current than limited by this statement?
Reference datasheet linked @ https://www.infineon.com/cms/en/product/power/mosfet/n-channel/irfb4020/
Greg
Show LessHello,
I am using a MA12040P for audio playback of a I2S stream being produced by the SAI peripheral of an iMX8M Plus.
I have ported the driver from the Raspberry Pi into the Linux kernel provided for the imx platform and it appears to function.
The problem I am having is that there is no audio output by the amplifier when I run the ALSA speaker test tool using the command line:
speaker-test -FS32_LE -Dsysdefault:merusaudio
My initial schematic for the connection between the iMX and the amp was:
This has been altered to switch the nMute line from a pull up to pull down and the MCLK signal is now routed to a clock output directly from the iMX clock peripheral and is set to 12288kHz.
This was done because the iMX8MP SAI peripheral will only output an MCLK signal during playback.
The SAI peripheral now consumes the MCLK from the external pin and generates the BCLK from that signal.
I have captured some of the signals on my scope:
Full Power-up Sequence:
There is a blip on the MCLK line when the output pin is first muxed to output the clock, a 24MHz signal is briefly present.
Clock Blip Detail
Enable Detail. MCLK is 12.288MHz at this point:
There is a 6-7 ns phase shift between MCLK edge and the BLCK edge, probably due to propagation through the SAI peripheral.
During Playback:
Here is a dump of some of the MA12040P registers after the driver has configured the device:
Address Value
0X00 |
0X3D |
0X01 |
0X3C |
0X02 |
0X32 |
0X03 |
0X5A |
0X04 |
0X50 |
0X08 |
0X26 |
0X0A |
0X0C |
0X12 |
0X13 |
0X13 |
0X0A |
0X14 |
0X14 |
0X15 |
0X09 |
0X16 |
0X0A |
0X17 |
0X14 |
0X18 |
0X14 |
0X19 |
0X1A |
0X1A |
0X20 |
0X1B |
0X19 |
0X1C |
0X0B |
0X1D |
0X00 |
0X1E |
0X2F |
0X20 |
0X1F |
0X25 |
0X10 |
0X26 |
0X05 |
0X27 |
0X08 |
0X2D |
0X30 |
0X2E |
0X84 |
0X35 |
0X88 |
0X36 |
0X41 |
0X40 |
0XFF |
0X41 |
0X00 |
0X42 |
0X18 |
0X43 |
0X18 |
0X44 |
0X18 |
0X45 |
0X18 |
0X46 |
0X00 |
0X47 |
0X27 |
0X48 |
0X27 |
0X49 |
0X18 |
0X4A |
0X18 |
0X4B |
0X00 |
0X60 |
0XC1 |
0X61 |
0X3E |
0X62 |
0X04 |
0X64 |
0XC1 |
0X65 |
0X3E |
0X66 |
0X04 |
0X68 |
0XC0 |
0X69 |
0XC9 |
0X6D |
0X00 |
0X74 |
0X10 |
0X75 |
0X05 |
0X7C |
0X00 |
0X7E |
0X00 |
I do not know what else to check as there are no errors being reported as far as I can tell.
Is the clock blip before the amp is enabled a problem?
Is the phase shift between the MCLK and the BCLK a problem?
Any thoughts on next steps in debugging this issue are appreciated.
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Hi
With IRS2452AM, application notes and examples describe 400kHz switching frequency (IRAUDAMP23 for exemple). How modify values to get self-oscillation frequency higher (around 600kHz or 700kHz) ?
Thank you
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Hello everybody
Using IRS2452AM for class D amplifier solution, we face a problem when output current on the load increases : output signal is disrupted on the negative side of the signal (see attached file) ; after checking other points, we see that PWM output signal is also disrupted.
All power supply seem clear.
Has anyone ever encountered this type of problem ?
Thank you
Show LessHello, I wander if chip name MA5332M is real product of Infieon. Is this the same as MA5332MS? Chip MA5332M is inside Sabaj amplifier, is it real Infieon or is it a feke?
Show LessHi Sirs,
I have a MA2304DNS EVAL Board, I can use this EVK to play music to speaker. But it seems not working when I adjust EQ,
here is the procedure:
1. connect power and speaker to EVK
2. Input audio <--I can hear the music correctly.
3. Run Merus 1.0.0-819
4. go to DSP page and setup low pass filter with fc at 100Hz (see attachment)
5. "APPLY".
5.1. I notice warning symbol is gone, after press "APPLY".
5.2. Music output from EVK disappear
6. reboot EVK
7. audio same as before, no any change (by ear)
I also tried different input signal such as 1kHz sine wave with 100Hz cutoff freq, but 1kHz audio still loud and clear after reboot.
My questions are:
1. Please help clarify above configuration procedure, I don't know where is the mistake.
2. Is reboot EVK necessary? I expect chip should reflect EQ result immediately after uploading, no need to reboot.
3. Can I read out filter parameter to Merus and display to DSP page ?
Thanks,
J66
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