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Class D Audio Amplifier IC Forum Discussions

Ravi
Level 1
Level 1
10 sign-ins First reply posted First like given

Hello,

Kindly help me with the following questions:

1. What should be the preferred voltage on MSEL0, MSEL1, nMUTE, nENABLE, nClip, nERROR, SCL, SDA, CLKM/S, CLKIO, AD0 and AD1? 3.3V or 5V?

2. What would be preferred way to generate VDD: 1. From PVDD using a linear regulator or 2. From an isolated supply? If using VDD from an isolated supply is preferred, what would be an ideal place to tie the two grounds together?

3. If using an isolated supply is preferred, I am assuming that AVSS, DVSS, CREF and CDC should be tied to the isolated ground. Is my assumption correct?

Thanks in advance!

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7 Replies
SC
Moderator
Moderator
Moderator
10 likes received 25 replies posted 10 solutions authored

Hi,

Sorry for the inconvenience, as suggested by @ amusz please refer to the eval schematic. 

evaluation board schematics

 

BR,

SC.

 

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Happy
Level 1
Level 1
5 replies posted 5 sign-ins First reply posted

嗨,新年快乐,我真的不明白你说的话,所以我想问,1。官方文件写的是5V,为什么给出的答案是3.3V,是否使用3.3V所有VDD电源都能使芯片正常工作。2. 使用降压LDO更简单,为什么要使用开关稳压器。

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Ravi
Level 1
Level 1
10 sign-ins First reply posted First like given

Hello SC,

I am confused. I understand that PVDD = 24V.

As per your reply, MSEL0, MSEL1, nMUTE, nENABLE, nClip, nERROR, SCL, SDA, CLKM/S, CLKIO, AD0  and AD1 should be 3.3V.

So now should VDD also be 3.3V or should it be 5V. If it needs to be 5V then the IC will need three supplies: 24V, 5V and 3.3V and that is not very elegant.

If the IC needs 5V for VDD, does it, using an internal regulator, convert it to 3.3V? Say at CRef (pin-20)? If yes, can we use it to pull-up the IO pins as needed?

Unless a complete reference application circuit incorporating all the design details is not published soon, I will not have full confidence to freeze my design and start layout.

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amusz
Employee
Employee
5 solutions authored 10 replies posted 10 sign-ins

Hi @Ravi,

Please follow the evaluation board schematics for reference on which pins to use 5V and which pins to use 3.3V.

Best regards

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Ravi
Level 1
Level 1
10 sign-ins First reply posted First like given

Hello,

Thank you for your early reply and for the link to the document.

Here is where things could be going wrong: The document which you referred to is v1.1 dt. Dec. 18, 2018, updated on the website on Feb. 5, 2019.

Kindly take a look at the document here. I referred to this document as I thought this had the latest date and so would me most updated. It is dated Apr. 28, 2019 and updated on the website on Mar. 23, 2022.
I expected this document to incorporate the hardware changes in the ERRATA dated. Apr. 8, 2019 and published on the website on Feb. 11, 2022. Unfortunately, it lacks both mention of use of clamping diodes on output pins and use of 3.3V supply

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Happy
Level 1
Level 1
5 replies posted 5 sign-ins First reply posted

是的,我看到它是最新的文件,我已经阅读了所有官方文件,但它没有得到很好的理解和解决。

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amusz
Employee
Employee
5 solutions authored 10 replies posted 10 sign-ins

Hi @Ravi,

You can use 5V for everything except for the I2C pull ups, which require 3.3V logic. In the reference design or in the evaluation board this is the same case.  However, in the evaluation board we generate pull ups on board but not in the reference design. Below are the logic levels of each pins for their high and low spec:

amusz_0-1674506702519.png

Regarding the errata sheet, some of its items are not implemented as they are valid for specific conditions. However, they are being implemented in a new evaluation board that will be public soon.

Best regards

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