CY8CMBR3xxx CapSense IIC Slave Address collision

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NXTY_Inoue
Level 3
Level 3
Distributor - NEXTY (Japan)
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Hi,

I know that the slave address of this device has 0x37 as the default value.

Since the slave address cannot be set by the external pin, it seems that multiple CY8CMBR3xxx cannot be connected on the same I2C bus if we do not change the slave address of CY8CMBR3xxx before assembly.

In fact, the host controller was unable to communicate well with multiple CY8CMBR3xxx on the same bus at first boot.

So our customer wants to reset the inactive CY8CMBR3xxx with XRES while the slave address is sent from the host.
Is this solution correct?

I want to make sure that all the functions of CY8CMBR3xxx including the I2C-Slave circuit are guaranteed to start from the initial state when the reset is released and the IC resumes operation.

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ncbs
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Hi @NXTY_Inoue,

It would be advisable to change the MBR3 device address [and the checksum], or use I2C switches to select one among many MBR3 devices used.

  1. You can modify the address of the MBR3 devices. By default, the address will be set to 0x37, and will be present in the I2C_ADDR register (0x51). This register can be configured using I2C. 
    When address is changed, the checksum has to be recalculated and stored back in the MBR3 flash. Refer to CRC calculation part from section 5.2.4.1 part b in AN90071 - CY8CMBR3xxx CapSense® Design Guide.

    ncbs_0-1643744717458.png

     



  2.  You may use I2C switches to select which slave to be communicated from the master. Since only one slave will be selected by the I2C switch at a time, the MBR3 devices may have the same address. 

 

Option 1 is a one-time configuration process and is easy. Option 2 retains the address to the default but has additional hardware requirement.

 

Regards,
Nikhil

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ncbs
Moderator
Moderator
Moderator
500 replies posted 50 likes received 250 sign-ins

Hi @NXTY_Inoue,

It would be advisable to change the MBR3 device address [and the checksum], or use I2C switches to select one among many MBR3 devices used.

  1. You can modify the address of the MBR3 devices. By default, the address will be set to 0x37, and will be present in the I2C_ADDR register (0x51). This register can be configured using I2C. 
    When address is changed, the checksum has to be recalculated and stored back in the MBR3 flash. Refer to CRC calculation part from section 5.2.4.1 part b in AN90071 - CY8CMBR3xxx CapSense® Design Guide.

    ncbs_0-1643744717458.png

     



  2.  You may use I2C switches to select which slave to be communicated from the master. Since only one slave will be selected by the I2C switch at a time, the MBR3 devices may have the same address. 

 

Option 1 is a one-time configuration process and is easy. Option 2 retains the address to the default but has additional hardware requirement.

 

Regards,
Nikhil

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