pll/spb clock monitor and testing

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User39504831
Level 2
Level 2
First like received First solution authored 10 replies posted

Hello

I am using Tc37x

I enabled the pll and spb monitoring by CCU_CON3 = 0x0F;

And when I update the value of CCU_CON3 = 0xF0F; to enable testing mode, the smu standby alm21[15] is not triggered

I want to monitor the pll and spb clk and trigger smu alarm21[15]

 

How can i do it.

Thanks

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1 Solution
Yuva
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250 replies posted 250 sign-ins 100 solutions authored

Hello,

We don't discuss queries related to licensed software like MC-ISAR in forum, we request you to please contact your local Infineon, distributor or software reseller contact.

Thanks.

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3 Replies
Yuva
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250 replies posted 250 sign-ins 100 solutions authored

Hello,

How is the CCUCON3 register updated? Is the UP bit of CCUCON3 register set for the update? Also, what is the reaction for the SMU alarm and have you done the relevant configurations for the same?

Thanks.

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Hi @Yuva 

I did not know this. I switched on the "UP" and after test alarm, smu alm21[15] is getting fault.

Now can you tell me one more thing, how do I keep the "UP" and "pll/spb mon" bits "ON" by default. I am using EB tresos, so can it be done by that software?

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Yuva
Moderator
Moderator
Moderator
250 replies posted 250 sign-ins 100 solutions authored

Hello,

We don't discuss queries related to licensed software like MC-ISAR in forum, we request you to please contact your local Infineon, distributor or software reseller contact.

Thanks.

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