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Dear Readers,
I am part of a team which migrates a single core software to a multicore.
The software is now running on one core properly.
In the very first step we want to duplicate the software on a second core.
Therefore we want to clone all functions with exception of the hw intimate ones.
How can that be done, that function void Foo( void ) runs twice on two cores?
We use the Hightec toolchain.
Any hints are appreciated!
Regards
Struppi
Solved! Go to Solution.
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Hi Struppi. In that case, it's very possible to build separate applications (separate elf/hex files). It's just a matter of having CPU0 start CPU1 from the right address. For example, assuming you're using a TC39x:
CPU0 would use its own linker file, using PFLASH from 0xA0000000-0xA02FFFFF, and RAM from 0x70000000-0x7003BFFF
CPU1 would use a separate linker file, using PFLASH from 0xA0300000-0xA05FFFFF, and RAM from 0x60000000-0x6003BFFF
At startup, CPU0 would need to set CPU1s PC to 0xA0300000, then start it.
The PFLASH addresses are very negotiable - you could have both CPUs execute from the same bank if necessary. Having them build into separate PFLASH banks will get you the best performance.
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Hi Struppi. There is typically no need to duplicate the function, because the default configuration allows every CPU core to access all of PFLASH. If Foo() is using global variables, then you do have to be careful about managing concurrency, through semaphores, etc.
In applications where performance is absolutely critical, you might want to copy Foo() into PSPR (Program Scratchpad RAM), and execute from that.
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Hi µC_Wrangler,
>is using global variables
we have tons of that and we want to avoid - at the beginning at least - to tackle with concurrency.
Is there no way? ( Flashing cores individually?,... )
Regards
Struppi
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Hi Struppi. In that case, it's very possible to build separate applications (separate elf/hex files). It's just a matter of having CPU0 start CPU1 from the right address. For example, assuming you're using a TC39x:
CPU0 would use its own linker file, using PFLASH from 0xA0000000-0xA02FFFFF, and RAM from 0x70000000-0x7003BFFF
CPU1 would use a separate linker file, using PFLASH from 0xA0300000-0xA05FFFFF, and RAM from 0x60000000-0x6003BFFF
At startup, CPU0 would need to set CPU1s PC to 0xA0300000, then start it.
The PFLASH addresses are very negotiable - you could have both CPUs execute from the same bank if necessary. Having them build into separate PFLASH banks will get you the best performance.
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Thank you!