can't disable watchdog on TC399XE

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User21723
Level 1
Level 1
Hello,

I've an application which is running when starting out of the debugger (lauterbach).

But when trying to start it without debugger the application resets quit fast.
I'm trying to disable the watchdogs, safety and cpu0, same behavior.
The only change was, when setting the CLRIRF, then the application resets cyclic.

My understanding is, that out of reset (without modifing any register) the CPU should run a couple of secs until the watchdog initiates the first reset.

any ideas

richard
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3 Replies
NeMa_4793301
Level 6
Level 6
10 likes received 10 solutions authored 5 solutions authored
The CPU will run for something like fifty milliseconds before a watchdog reset by default.

Are you using the iLLD and/or AURIX Development Studio? This code in Cpu0_Main.c disables the CPU watchdog and the Safety Watchdog:

/* !!WATCHDOG0 AND SAFETY WATCHDOG ARE DISABLED HERE!!
* Enable the watchdogs and service them periodically if it is required
*/
IfxScuWdt_disableCpuWatchdog(IfxScuWdt_getCpuWatchdogPassword());
IfxScuWdt_disableSafetyWatchdog(IfxScuWdt_getSafetyWatchdogPassword());
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User21723
Level 1
Level 1
i've used the example from the tasking toolchain:


/* TASKING\TriCore_v6.2r2\backup_patch4\ctc\examples\blink_aurix\cstart.c */

safety_endinit_set(_ENDINIT_DISABLE);
SCU_WDTSCON1 |= 0x8+0x1; /* +1 : CLRIF bit -> cyclic resets */
safety_endinit_set(_ENDINIT_ENABLE);
/* safety_endinit_set(_ENDINIT_DISABLE); enable WD again ! */


endinit_set(_ENDINIT_DISABLE);
SCU_WDTCPU0CON1 |= 0x8;
endinit_set(_ENDINIT_ENABLE);
/* endinit_set(_ENDINIT_DISABLE); */




and the "safety_endinit_set(_ENDINIT_DISABLE)" enabled the WD again. Now its working.

You know from the 50ms inital WD-Time are calculated?

i thought (2^16 * 16384) / 100Mhz = 10 sec

thanks

richard
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ScottW
Employee
Employee
10 sign-ins First solution authored First like received
There is a timeout on disabling ENDINIT protection. If ENDINIT remains disabled past that timeout, the watchdog enters its fault state. This is why disabling it without reenabling it causes a reset.

Note that the calculation for timeout is

period = ((2^16- startvalue ) *divider)/ fSPB


The default start value after reset is 0xFFFC.
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