Regarding the ADS Tasking linker file, change the defined variable from the original PFLASH to the DFLASH location. Assuming I define a variable in the C code, if I don't specify a location, it will be stored in the PFLASH position by default. This is not a problem, then if I assume that I initialize and define a variable in C code, the initial specification should be at the DFLASH 0xAF00 0000 position, taking LED example code_tc297 as an example, How do I modify the Tasking Linker file?

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/AURIX/ADS-Tasking-linker-file/td-p/653903

HI, All 

I  put the function int the  PSRAM address, I check the map ,it works.

But the HEX file is not included the PSRAM address.

How can I config the lsl or the tools to get the PSRAM address in HEX file?

How can the tc233 UART send and receive data be bound to DMA? After binding to DMA, is the interrupt trigger still the interrupt service function bound to the original ifxCPU_irq_installInterruptHandler () function? The interrupts currently used are CPU resources. The amount of data is large. Each byte is interrupted once during reception, which is a waste of resources. Have you ever done this thigh piece? I hope you can share your experience. Thank you even more for any related demos you can provide!

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/AURIX/DMA-Uart%E4%B8%AD%E6%96%AD/td-p/654865

Hi

I need some more information about the interrupt concentrator module and the connection with the uC. I suppose it was quite simple but now I'm getting some strange behaviour..

I've two signals, one on TOm0 CH6 and one on TOM0 CH7. CH7 is a slave of one previous channels (CH0) and CH6 is a stand-alone channel (CH6 CN0 is reset by itself if it matters..)

I've activate on both channel (one per time since they share the same uC SCR) the interrupt setting them as MODE PULSE and setting IRQ_EN to 3 (any edge). The result is that I can have the CH7 interrupts callback but not the CH6

In register GTM_IRQG_6 I can see that both CH7 and CH6 change from "no interrupt" to "interrupt" but on SRC_GTOM03 I don't get any change when CH6 interrupt is active

I know that TOM0CH6 and TOM0CH7 share the same ICM out so any of the two should generate the interrupt (that I can see that are triggered in GTM_ICM_IRQG_6 and in GTM_ICM_IRQG_TOM_0_CI) but CH6 seems no more propagated out of the GTM

There is something else I need to consider between the GTM and the IR?  there is a way to check the value of the signal GTM_TOM0_IRQ3 (the one of the figure138 user manual part 2)?

thanks in advance

Hello all,

    I am working on decoding the resolver signal and I am using the edsadc and rdc library downloaded for TC38x motor control software. 

When i feed the resolver signal  I cannot see any conversion results as it flicks between 1 and 65536 value. I can see the fault status enable to 0xFFFFFF as you can see in the screen shot. 

what part i am missing, please can anyone shed your thoughts. 

Many thanks 

如果將陣列變數初始值想要改放在 DFLASH 0xAF00 0000 位置上 , 請問在Tasking linker file 怎樣設定 ? 

#define BUFF_SIZE 8192
uint32 ATQD_LHMTqMapDLC_Y_rpm[BUFF_SIZE] = { 30, 0, 20, 15, 35,36, 37, 38 } ;
uint32 ATQD_LHMTqMapDLC_1_rpm[BUFF_SIZE] = { 30, 0, 20, 15, 35,36, 37, 38 } ;

Hello, everyone.
I need to use the ASCLIN module in ASC mode to make two Tricore tc3 communicate using the UART protocol. One tc3 will be the Tx and the other will be the Rx and each transmission must be 5 bytes long.
For this purpose, I created two projects in ADS, one for the transmitter and the other for the receiver.
I have some doubts about the receiving mechanism, reading the description of the ASC mode in the manual "Infineon-AURIX_TC3xx_Part2-UserManual-v02_00-EN" in section 36.3.2.7 I did not quite understand what happens each time a byte is received.
Referring to the example "ASCLIN_UART_1_KIT" I did not understand what the receive buffer g_ascRxBuffer[UART_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8] is used for, and I did not understand what element to associate it with in the manual description.
I would also like to understand what happens inside the receiving ISR, in particular what the function IfxAsclin_Asc_isrReceive(&g_ascHandle) does.

I would like to understand the communication mechanism because I would like to try out the various interrupt modes: single move, batch and combined to see which one is best for my application.

Thank you in advance for your help

For tc397 to be the master, call ifxQSPI_spimaster_exchange at once to exchange 4 bytes of data. When transferring between bytes, how is clk configured to be non-continuous? In other words, after each byte has been transferred, we want to have an idle clk state, and then start transferring the next byte.

SAL-TC397XP-256F300S BD @Jeremy_Z

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/AURIX/tc397-qspi-%E5%85%B3%E4%BA%8Etc397%E5%81%9Amaster-%E4%B8%80%E6%AC%A1%E8%B0%83%E7%94%A8IfxQspi-SpiMaster-exchange%E4%BA%A4%E6%8D%A24%E4%B8%AA%E5%AD%97%E8%8A%82%E7%9A%84%E6%95%B0%E6%8D%AE-byte%E4%B9%8B%E9%97%B4%E4%BC%A0%E8%BE%93%E7%9A%84%E6%97%B6%E5%80%99/td-p/653474

Hello Team ,

   We meet below problem , can you give support? Thanks.