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AURIX™ Forum Discussions

prethibha
AURIX™
We are using lauterbach dedugger for flashing and debugging. After enabling WDT, getting soft reset in debugger at application start itself. When WDT... Show More
EDKANG
AURIX™
What material is the metal hydroxide used in the device substrate made of?I would appreciate it if you could let me know Cas#. Product: SAK-TC387TP-12... Show More
yongjun
AURIX™
如何禁用SMU Alarm的生成? 在芯片手册中AGiCFj (i=0-11;j=0-2)我的理解是禁用SMU Alarm的相应动作,但是如何禁止Alarm的生成?   Show More
Dschunke
AURIX™
Hi team, I am trying to run the following example code without any changes on Tc399 triboard EVK: https://www.infineon.com/dgdl/Infineon-ASCLIN_SPI_Master_1_KIT_TC397_TFT-Training-v01_02-EN.pdf?fileId=5546d4627883d7e00178a2d609943911&redirId=136496... Show More
ytx
AURIX™
0xaf40 2208查看手册,写的是HF_PROCONRAM,配置为1的话,冷启动后不初始化RAM,配置为0的话,冷启动后初始化RAM 我们在使用过程中产生了一个不太理解的问题: 配置为1的时候,OS上电后,初始化访问到如下位置会crash(0xaf40 2818 是配置HSM是否初始化的地址) ... Show More
SanthoshSR_105
AURIX™
Hello, I am trying to configure UART TX interrupt for ASCLIN2. I would like the know the Interrupt source number. Meaning, I would like to use this in... Show More
Nikhil_U
AURIX™
CAN Connector
solved msg Solved
Hello, We have the Infineon controller KIT_A2G_TC377_SEC_GTW, can anyone suggest me where should I get the CAN connector?      Thanks, Nikhil.   Show More
Sakthivel
AURIX™
Hi team, We had designed custom board of Aurix TC39x. We are working on bringing up Ethernet. For the Ethernet evaluation we are using the existing Et... Show More
HUOYU
AURIX™
Hi,  When I run the AURIX Development Studio(ADS) code examples "OneEye_DAS_Quickstart_1_KIT_TC375_LK" and "OneEye_DAS_Oscilloscope_1_KIT_TC375_LK", I... Show More
123rtgr
AURIX™
Hi, l want to know some thing about trap. l'm using tc334.  l remember there are seven or eight classes trap in tc334. Is there a priority relationshi... Show More
Forum Information

AURIX™

In this forum you can post your questions, comments and feedback about the 32-bit AURIX™ TriCore™ Microcontroller. The AURIX™ offers the highest scalability in performance, memory & peripherals across application. It is a safe and secure companion chip, meeting both the ISO functional safety standards and EVITA full security standards. Here you can also find the links to the latest board pages, SW and Tools GitHub, trainings, documents and FAQs