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AURIX™ Forum Discussions

Anonymous
AURIX™
Hi,everybody,How to deal with the CAN bus errors?such as 'BIT0','BIT1',LLE,LOE,and so on.In additional,what should I do when class A or B trap occurs? Show More
harrechr
AURIX™
Hello, I am trying something which may be using GPIO pins in an unintended way. But currently I am not sure where exactly the limitation is, so I want... Show More
PawLo
AURIX™
Hi EveryoneI try to follow documentation of Tasking Compiler to change linking to be incremental - so far without success.My idea to enable incrementa... Show More
saikiran
AURIX™
We are using AURIX TC387. There is only one example with internal loopback communication. But there is no normal CAN communication example. So, I rese... Show More
漫游者HAHAHAH
AURIX™
#TC39XB 问题描述: 我设置的段是const类型, 1、设置一个section,然后向这个段中添加对象, #define XXX_INFO __attribute__((used, protect)) __attribute__((section("info_table"))) const s... Show More
HyeonwooPark
AURIX™
TC234 is being developed based on iLLD. When I load a few header files I created myself, an error like the attached image occurs. I'm not sure what th... Show More
Shute10
AURIX™
Hi, we need control 4 BLDC. If we use TC298 as micro controller, is it possible to control 4 BLDC. The frequency of BLDC may be not high, no more th... Show More
ShailiJhaNew
AURIX™
Hello Champs, We have integrated the IOM driver provided as iLLD from https://github.com/Infineon/AURIX_code_examples/tree/master/code_examples/IOM_PWM_Monitor_1_KIT_TC297_TFT... Show More
Sachin
AURIX™
I am designing a Communication Board that involves the HSSL communication for the master slave ECU. for the HW wise i am still in confusion for the co... Show More
Translation_Bot
AURIX™
Hi all,   Regarding the channel on the ADC, I would like to ask what group id and channel id are corresponding to AN36? @Kunqiao_L   Best explanation ... Show More
Forum Information

AURIX™

In this forum you can post your questions, comments and feedback about the 32-bit AURIX™ TriCore™ Microcontroller. The AURIX™ offers the highest scalability in performance, memory & peripherals across application. It is a safe and secure companion chip, meeting both the ISO functional safety standards and EVITA full security standards. Here you can also find the links to the latest board pages, SW and Tools GitHub, trainings, documents and FAQs