AURIX™ Forum Discussions
some how the other team member found out the used ustack_tc0 value , now i need to compare this value with actual stack memory allocated for this aurix 27x micro controller. can any one help me on this.
thanks in advance.
Show LessHello,
Target device is the TC333LP. The Mbist component follows all the principles and instructions written in the AURIXTC3XX_ts_part1_V2.5.1. The initialization process and running the NDT of GANGs 0, 2, 3 gives positive results and is working without any issues. The situation changes when we want to initialize DSPR SRAMS of the CPU0 (DMEM and DMEM1).
Enabling the test mode using the MEMTEST registers results in the bus error. The situation is the same for DMEM and DMEM1 and they use different MEMTEST registers. The initialization was done in compliance with hints given in the Handling of Large DSPR SRAMs chapter in the TC33xEXT_appx_um_v2.0 document - the test mode for them is not running parallelly.
It does not also seem like an access mode issue - the registers change their values to those which are written into them. The autoinitialization is also not running when the test mode is enabled.
What I have found is that the Data Integrity Error in the Scratchpad memory.
How can this issue be addressed? What could be the reason of it?
can anyone tell me the difference between Confirmation code and unlocked code in UCB. in community itself i saw some answers like if confirmation code is confirmed user can't reprogram UCB but, i can reprograme if Confirmation code is confirmed also. And if UCB confirmation code is unlocked code also i'm able to reprograme so what is the difference?
And i can erase & reprograme UCB confirmation code to Unlocked if UCB confirmation code is confirmed & viceverca.
I checked above cases in UCB_PFLASH
/**********************************************************************************************************************
* \file SPI_DMA.c
* \copyright Copyright (C) Infineon Technologies AG 2019
*
* Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of
* business you are acting and (ii) Infineon Infineon Technologies AG or its licensees. If and as long as no such terms of use
* are agreed, use of this file is subject to the following.
*
* Boost Software License - Version 1.0 - August 17th, 2003
*
* Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and
* accompanying documentation covered by this license (the "Software ") to use, reproduce, display, distribute, execute, and
* and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software belongs.
* Software is furnished to do so, all subject to the following.
*
* :: The copyright notices in the Software and this entire statement, including the above license grant, this restriction
* and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all
* derivative works of the Software, unless such copies or derivative works are solely in the form of
* :: Machine-executable object code generated by a source language processor.
*
* THE SOFTWARE IS PROVIDED "AS IS ", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. in no event shall the
* COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN
* :: compact, tort or otherwise, arisings from, out of or in connection with the software or the use or other dealings
* ♪ in the software.
*********************************************************************************************************************/
/*********************************************************************************************************************/
/*-----------------------------------------------------Includes------------------------------------------------------*/
/*********************************************************************************************************************/
#include "SPI_DMA.h "
#include "IfxPort.h "
#include "ifxQspi_SpiSlave.h "
#include "ifxPort_regdef.h "
#include "stdio.h "
/*********************************************************************************************************************/
/*------------------------------------------------------Macros-------------------------------------------------------*/
/*********************************************************************************************************************/
#define QSPI2_MASTER &MODULE_QSPI2 /* SPI Master Hardware module */
#define QSPI3_SLAVE &MODULE_QSPI3 /* SPI Slave Hardware module */
#define LED_D110 &MODULE_P13,3 /* LED D110 Port, Pin definition */
#define ISR_PRIORITY_QSPI2_TX 1 /* Define the QSPI2 transmit interrupt priority */
#define ISR_PRIORITY_QSPI2_RX 2 /* Define the QSPI2 receive interrupt priority */
#define ISR_PRIORITY_QSPI2_ER 10 /* Define the QSPI2 error interrupt priority */
#define ISR_PRIORITY_QSPI3_TX 3 /* Define the QSPI3 transmit interrupt priority */
#define ISR_PRIORITY_QSPI3_RX 4 /* Define the QSPI3 receive interrupt priority */
#define ISR_PRIORITY_QSPI3_ER 11 /* Define the QSPI3 error interrupt priority */
#define ISR_PRIORITY_DMA_CH1 50 /* Define the DMA channel1 interrupt priority */
#define ISR_PRIORITY_DMA_CH2 51 /* Define the DMA channel2 interrupt priority */
#define ISR_PRIORITY_DMA_CH3 52 /* Define the DMA channel3 interrupt priority */
#define ISR_PRIORITY_DMA_CH4 53 /* Define the DMA channel4 interrupt priority */
#define ISR_PROVIDER_QSPI2 IfxSrc_Tos_cpu0 /* Define the QSPI2 interrupt provider */
#define ISR_PROVIDER_QSPI3 IfxSrc_Tos_cpu0 /* Define the QSPI3 interrupt provider */
#define ISR_PROVIDER_DMA_CH1 IfxSrc_Tos_cpu0 /* Define the DMA Channel1 interrupt provider */
#define ISR_PROVIDER_DMA_CH2 IfxSrc_Tos_cpu0 /* Define the DMA Channel2 interrupt provider */
#define ISR_PROVIDER_DMA_CH3 IfxSrc_Tos_cpu0 /* Define the DMA Channel3 interrupt provider */
#define ISR_PROVIDER_DMA_CH4 IfxSrc_Tos_cpu0 /* Define the DMA Channel4 interrupt provider */
#define MASTER_CHANNEL_BAUDRATE 1000000 /* Master channel baud rate */
/*********************************************************************************************************************/
/*-------------------------------------------------Global variables--------------------------------------------------*/
/*********************************************************************************************************************/
qspiDma g_qspiDma. /* Global handle for QSPI communication */
/*********************************************************************************************************************/
/*------------------------------------------------Function Prototypes------------------------------------------------*/
/*********************************************************************************************************************/
static void initQSPI2Master ( static void initQSPI2Master ( );
static void initQSPI2MasterChannel ( void ).
static void initQSPI2MasterBuffers ( void );
static void initQSPI3Slave ( static void initQSPI3Slave ( );
static void initQSPI3SlaveBuffers ( void );
static void initQSPI ( void );
static void initLED ( void );
/*********************************************************************************************************************/
/*---------------------------------------------Function Implementations----------------------------------------------*/
/*********************************************************************************************************************/
IFX_INTERRUPT( QSPI2ErrorISR , 0, ISR_PRIORITY_QSPI2_ER); /* SPI Master Error Interrupt definition */
IFX_INTERRUPT( QSPI3ErrorISR , 0, ISR_PRIORITY_QSPI3_ER); /* SPI Slave Error Interrupt definition */
IFX_INTERRUPT( DMAChn1ISR , 0, ISR_PRIORITY_DMA_CH1); /* DMA Channel 1 Interrupt definition */
IFX_INTERRUPT( DMAChn2ISR , 0, ISR_PRIORITY_DMA_CH2); /* DMA Channel 2 Interrupt definition */
IFX_INTERRUPT( DMAChn3ISR , 0, ISR_PRIORITY_DMA_CH3); /* DMA Channel 3 Interrupt definition */
IFX_INTERRUPT( DMAChn4ISR , 0, ISR_PRIORITY_DMA_CH4); /* DMA Channel 4 Interrupt definition */
/* Handle QSPI2 Error interrupt */
void QSPI2ErrorISR ( void )
{
IfxCpu_enableInterrupts();
IfxQspi_SpiMaster_isrError( &g_qspiDma. spiMaster );
}
/* Handle QSPI3 Error interrupt */
void QSPI3ErrorISR ( void )
{
IfxCpu_enableInterrupts();
IfxQspi_SpiSlave_isrError( &g_qspiDma. spiSlave );
}
/* Handle DMA Channel 1 interrupt */
void DMAChn1ISR ( void )
{
IfxCpu_enableInterrupts();
IfxQspi_SpiMaster_isrDmaTransmit( &g_qspiDma. spiMaster ).
}
/* Handle DMA Channel 2 interrupt */
void DMAChn2ISR ( void )
{
IfxCpu_enableInterrupts();
IfxQspi_SpiMaster_isrDmaReceive( &g_qspiDma. spiMaster ).
}
/* Handle DMA Channel 3 interrupt */
void DMAChn3ISR ( void )
{
IfxCpu_enableInterrupts();
IfxQspi_SpiSlave_isrDmaTransmit( &g_qspiDma. spiSlave );
}
/* Handle DMA Channel 4 interrupt */
void DMAChn4ISR ( void )
{
IfxCpu_enableInterrupts();
IfxQspi_SpiSlave_isrDmaReceive( &g_qspiDma. spiSlave );
}
/* This function initializes QSPI2 in master mode */
static void initQSPI2Master ( void )
{
IfxQspi_SpiMaster_Config spiMasterConfig. /* Define the Master Configuration */
IfxQspi_SpiMaster_initModuleConfig( &spiMasterConfig, QSPI2_MASTER); /* Initialize it with default values */
IfxQspi_SpiMaster_Pins IfxQspi_SpiMaster_Pins qspi2Masterpins = {
&IfxQspi2_SCLK_P15_3_OUT, IfxPort_OutputMode_pushPull, IfxPort_OutputMode_pushPull IfxPort_OutputMode_pushPull IfxQspi2_SCLK_P15_3_OUT /* SCLK Pin (CLK) */
&IfxQspi2_MTSR_P15_5_OUT, IfxPort_OutputMode_pushPull IfxQspi2_MTSR_P15_5_OUT /* Master Transmit Slave Receive Pin (MOSI) */
&IfxQspi2_MRSTA_P15_4_IN, IfxPort_InputMode_pullDown, IfxPort_InputMode_pullDown IfxPort_InputMode_pullDown IfxQspi2_MRSTA_P15_4_IN /* Master Receive Slave Transmit Pin (MISO) */
IfxPort_PadDriver_cmosAutomotiveSpeed3 /* Pad driver mode */
};
spiMasterConfig. pins = &qspi2Masterpins; /* Assign Master Pins */
spiMasterConfig. dma . useDma = TRUE.
spiMasterConfig. dma . txDmaChannelId = IfxDma_ChannelId_1 IfxDma_ChannelId_1
spiMasterConfig. dma . rxDmaChannelId = IfxDma_ChannelId_2 IfxDma_ChannelId_2
spiMasterConfig. base . txPriority = ISR_PRIORITY_DMA_CH1.
spiMasterConfig. base . rxPriority = ISR_PRIORITY_DMA_CH2.
spiMasterConfig. base . spiMasterConfig. base . = ISR_PRIORITY_QSPI2_ER.
spiMasterConfig. base . isrProvider = ISR_PROVIDER_QSPI2.
/* Initialize the QSPI Master module using the user configuration */
IfxQspi_SpiMaster_initModule( &g_qspiDma. spiMaster , &spiMasterConfig).
}
/* This function initializes QSPI2 channel. */
static void initQSPI2MasterChannel ( void )
{
IfxQspi_SpiMaster_ChannelConfig IfxQspi_SpiMaster_ChannelConfig; spiMasterChannelConfig. /* Define the Master Channel Configuration */
IfxQspi_SpiMaster_initChannelConfig( &spiMasterChannelConfig, &g_qspiDma. spiMaster ); /* Initialize it with default values */
spiMasterChannelConfig. base . baudrate = MASTER_CHANNEL_BAUDRATE; /* Set SCLK frequency to 1 MHz */. /* Set SCLK frequency to 1 MHz */
IfxQspi_SpiMaster_Output IfxQspi_SpiMaster_Output qspi2SlaveSelectQspi3 = {
&IfxQspi2_SLSO0_P15_2_OUT, IfxPort_OutputMode_pushPull IfxPort_OutputMode_pushPull /* Slave Select Pin (CS) */
IfxPort_PadDriver_cmosAutomotiveSpeed1 /* Pad driver mode */
};
spiMasterChannelConfig. sls . output = qspi2SlaveSelectQspi3.
/* Initialize the QSPI Master channel using the user configuration */
IfxQspi_SpiMaster_initChannel( &g_qspiDma. spiMasterChannel , &spiMasterChannelConfig);
}
/* This function initializes Master SW buffers */
static void initQSPI2MasterBuffers ( void )
{
for ( uint32 i = 0; i < SPI_BUFFER_SIZE; i++)
{
/* Fill the SPI Master TX Buffer */
g_qspiDma. qspiBuffer . spiMasterTxBuffer [i] = ( uint8 )(i + 1);
/* Clear the SPI Master RX Buffer */
g_qspiDma. qspiBuffer . spiMasterRxBuffer [i] = 0;
}
}
/* This function initializes QSPI3 in Slave mode */
static void initQSPI3Slave ( void )
{
IfxQspi_SpiSlave_Config spiSlaveConfig. /* Define the Slave Configuration */
IfxQspi_SpiSlave_initModuleConfig( &spiSlaveConfig, QSPI3_SLAVE); /* Initialize it with default values */
/* Enable DMA mode*/
spiSlaveConfig. dma . useDma = TRUE.
/* Set SPI slave DMA channels */
spiSlaveConfig. dma . txDmaChannelId = IfxDma_ChannelId_3 IfxDma_ChannelId_3
spiSlaveConfig. dma . rxDmaChannelId = IfxDma_ChannelId_4 IfxDma_ChannelId_4
/* Configure SPI slave interrupts */
spiSlaveConfig. base . txPriority = ISR_PRIORITY_DMA_CH3.
spiSlaveConfig. base . rxPriority = ISR_PRIORITY_DMA_CH4.
spiSlaveConfig. base . erPriority = ISR_PRIORITY_QSPI2_ER.
spiSlaveConfig. base . isrProvider = ISR_PROVIDER_QSPI2.
IfxQspi_SpiSlave_Pins IfxQspi_SpiSlave_Pins qspi3Slavepins = {
&IfxQspi3_SCLKA_P02_7_IN, IfxPort_InputMode_pullDown, IfxPort_InputMode_pullDown IfxPort_InputMode_pullDown IfxQspi3_SCLKA_P02_7_IN /* SCLK Pin (CLK) */
&IfxQspi3_MTSRA_P02_6_IN, IfxPort_InputMode_pullDown, IfxPort_InputMode_pullDown IfxPort_InputMode_pullDown IfxQspi3_MTSRA_P02_6_IN /* Master Transmit Slave Receive Pin (MOSI) */
&IfxQspi3_MRST_P02_5_OUT, IfxPort_OutputMode_pushPull, IfxPort_OutputMode_pushPull IfxPort_OutputMode_pushPull IfxPort_OutputMode_pushPull /* Master Receive Slave Transmit Pin (MISO) */
&IfxQspi3_SLSIA_P02_4_IN, IfxPort_InputMode_pullDown, IfxPort_InputMode_pullDown IfxPort_InputMode_pullDown IfxQspi3_SLSIA_P02_4_IN /* Slave Select Pin (CS) */
IfxPort_PadDriver_cmosAutomotiveSpeed3 /* Pad driver mode */
};
/* Assign Slave Pins */
spiSlaveConfig. pins = &qspi3Slavepins.
/* Initialize QSPI Slave module */
IfxQspi_SpiSlave_initModule( &g_qspiDma. spiSlave , &spiSlaveConfig).
}
/* Initialize Slave SW buffers */
static void initQSPI3SlaveBuffers ( void )
{
for ( uint32 i = 0; i < SPI_BUFFER_SIZE; i++)
{
/* Fill the SPI Slave TX Buffer */
g_qspiDma. qspiBuffer . spiSlaveTxBuffer [i] = ( uint8 )(i + 0x64);
/* Clear the SPI Slave RX Buffer */
g_qspiDma. qspiBuffer . spiSlaveRxBuffer . [i] = 0;
}
}
/* This function initializes the LED */
static void initLED ( void )
{
/* Set the port pin 13.3 (to which the LED D110 is connected) to output push-pull mode */
IfxPort_setPinModeOutput(LED_D110, IfxPort_OutputMode_pushPull IfxPort_setPinModeOutput(LED_D110, IfxPort_OutputMode_pushPull) IfxPort_OutputIdx_general ).
/* Turn off the LED (LED is low-level active) */
IfxPort_setPinHigh(LED_D110).
}
/* This function initializes the QSPI modules */
static void initQSPI ( void )
{
/* Firstly initialize the Slave */
initQSPI3Slave(); initQSPI3Slave().
initQSPI3SlaveBuffers(); initQSPI3SlaveBuffers().
/* Secondly initialize the Master */
initQSPI2Master(); initQSPI2Master(); initQSPI2Master().
initQSPI2MasterChannel(); initQSPI2MasterChannel().
initQSPI2MasterBuffers(); initQSPI2MasterBuffers().
}
/* This function initializes the SPI and the LED called from Cpu0_Main */
void initPeripherals ( void )
{
initLED().
initQSPI().
}
/* This function ensures the QSPI communication between Master and Slave and checks whether
* :: The data transfer was correct or not
*/
void transferData ( void )
{
uint32 i;
uint32 error = 0;
/* Enable SPI Slave for communication */
IfxQspi_SpiSlave_exchange( &g_qspiDma. spiSlave , &g_qspiDma. qspiBuffer . spiSlaveTxBuffer . [0], .
&g_qspiDma. qspiBuffer . spiSlaveRxBuffer. [0], SPI_BUFFER_SIZE);
/* Start SPI Master communication */
IfxQspi_SpiMaster_exchange( &g_qspiDma. spiMasterChannel , &g_qspiDma. qspiBuffer . spiMasterTxBuffer [0], .
&g_qspiDma. qspiBuffer . spiMasterRxBuffer [0], SPI_BUFFER_SIZE);
/* Wait until the slave received all data */
while (IfxQspi_SpiSlave_getStatus( &g_qspiDma. spiSlave ) == SpiIf_Status_ok )
{
}
/* Compare exchanged data */
for (i = 0; i < SPI_BUFFER_SIZE; i++)
{
if (g_qspiDma. qspiBuffer . spiSlaveRxBuffer [i] ! = g_qspiDma. qspiBuffer . spiMasterTxBuffer [i])
{
error++;
}
if (g_qspiDma. qspiBuffer . spiMasterRxBuffer [i] ! = g_qspiDma. qspiBuffer . spiSlaveTxBuffer [i])
{
error++;
}
}
/* Switch on the LED D110 in case of no errors (LED is low-level active) */
if (error == 0)
{
IfxPort_setPinLow(LED_D110).
}
}
#define Master_SPI_CS &MODULE_P15, 2
SPI_FLASH_ReadID SPI_FLASH_ReadID ( uint32 SPI_FLASH_ReadID )
{
uint16 id;
g_qspiDma. qspiBuffer . spiMasterTxBuffer [0] = ( uint32 )(0x90);
g_qspiDma. qspiBuffer . spiMasterTxBuffer [1] = ( uint32 )(0x00);
g_qspiDma. qspiBuffer . spiMasterTxBuffer [2] = ( uint32 )(0x00);
g_qspiDma. qspiBuffer . spiMasterTxBuffer [3] = ( uint32 )(0x00);
g_qspiDma. qspiBuffer . spiMasterTxBuffer [4] = ( uint32 )(0xFF);
g_qspiDma. qspiBuffer . spiMasterTxBuffer [5] = ( uint32 )(0xFF);
uint8 MID.
uint16 DID;
IfxPort_setPinLow(Master_SPI_CS).
IfxQspi_SpiMaster_exchange( &g_qspiDma. spiMasterChannel , &g_qspiDma. qspiBuffer . spiMasterTxBuffer , spiMasterTxBuffer
&g_qspiDma. qspiBuffer . spiMasterRxBuffer , 6).
while (IfxQspi_SpiMaster_getStatus( &g_qspiDma. spiMaster ) == SpiIf_Status_busy )
{
}
IfxPort_setPinHigh(Master_SPI_CS).
DID=( uint32 )g_qspiDma. qspiBuffer . spiMasterRxBuffer [0];
return DID.
printf ("%x " ,DID);
}
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/AURIX/TC397%E4%BD%BF%E7%94%A8spi%E8%AF%BB%E5%8F%96w25q%E7%9A%84id-%E4%BD%86%E6%9C%80%E7%BB%88%E7%9A%84rxbuff%E9%83%BD%E6%98%AF0-%E4%BD%BF%E7%94%A8%E7%9A%84%E6%97%B6397%E6%9C%80%E5%BC%80%E5%A7%8B%E7%9A%84demo-%E5%B0%B1%E5%A2%9E%E5%8A%A0%E4%BA%86%E4%B8%80%E4%B8%AA%E8%AF%BB%E5%8F%96%E5%87%BD%E6%95%B0-%E6%B2%A1%E4%BD%BF%E7%94%A8tansfer-%E7%A8%8B%E5%BA%8F%E5%A6%82%E5%A6%82%E4%B8%8B/td-p/721562
Show Less/**********************************************************************************************************************
* \file SPI_DMA.c
* \copyright Copyright (C) Infineon Technologies AG 2019
*
* Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of
* business you are acting and (ii) Infineon Infineon Technologies AG or its licensees. If and as long as no such terms of use
* are agreed, use of this file is subject to the following.
*
* Boost Software License - Version 1.0 - August 17th, 2003
*
* Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and
* accompanying documentation covered by this license (the "Software ") to use, reproduce, display, distribute, execute, and
* and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software belongs.
* Software is furnished to do so, all subject to the following.
*
* :: The copyright notices in the Software and this entire statement, including the above license grant, this restriction
* and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all
* derivative works of the Software, unless such copies or derivative works are solely in the form of
* :: Machine-executable object code generated by a source language processor.
*
* THE SOFTWARE IS PROVIDED "AS IS ", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. in no event shall the
* COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN
* :: compact, tort or otherwise, arisings from, out of or in connection with the software or the use or other dealings
* ♪ in the software.
*********************************************************************************************************************/
/*********************************************************************************************************************/
/*-----------------------------------------------------Includes------------------------------------------------------*/
/*********************************************************************************************************************/
#include "SPI_DMA.h "
#include "IfxPort.h "
#include "ifxQspi_SpiSlave.h "
#include "ifxPort_regdef.h "
#include "stdio.h "
/*********************************************************************************************************************/
/*------------------------------------------------------Macros-------------------------------------------------------*/
/*********************************************************************************************************************/
#define QSPI2_MASTER &MODULE_QSPI2 /* SPI Master Hardware module */
#define QSPI3_SLAVE &MODULE_QSPI3 /* SPI Slave Hardware module */
#define LED_D110 &MODULE_P13,3 /* LED D110 Port, Pin definition */
#define ISR_PRIORITY_QSPI2_TX 1 /* Define the QSPI2 transmit interrupt priority */
#define ISR_PRIORITY_QSPI2_RX 2 /* Define the QSPI2 receive interrupt priority */
#define ISR_PRIORITY_QSPI2_ER 10 /* Define the QSPI2 error interrupt priority */
#define ISR_PRIORITY_QSPI3_TX 3 /* Define the QSPI3 transmit interrupt priority */
#define ISR_PRIORITY_QSPI3_RX 4 /* Define the QSPI3 receive interrupt priority */
#define ISR_PRIORITY_QSPI3_ER 11 /* Define the QSPI3 error interrupt priority */
#define ISR_PRIORITY_DMA_CH1 50 /* Define the DMA channel1 interrupt priority */
#define ISR_PRIORITY_DMA_CH2 51 /* Define the DMA channel2 interrupt priority */
#define ISR_PRIORITY_DMA_CH3 52 /* Define the DMA channel3 interrupt priority */
#define ISR_PRIORITY_DMA_CH4 53 /* Define the DMA channel4 interrupt priority */
#define ISR_PROVIDER_QSPI2 IfxSrc_Tos_cpu0 /* Define the QSPI2 interrupt provider */
#define ISR_PROVIDER_QSPI3 IfxSrc_Tos_cpu0 /* Define the QSPI3 interrupt provider */
#define ISR_PROVIDER_DMA_CH1 IfxSrc_Tos_cpu0 /* Define the DMA Channel1 interrupt provider */
#define ISR_PROVIDER_DMA_CH2 IfxSrc_Tos_cpu0 /* Define the DMA Channel2 interrupt provider */
#define ISR_PROVIDER_DMA_CH3 IfxSrc_Tos_cpu0 /* Define the DMA Channel3 interrupt provider */
#define ISR_PROVIDER_DMA_CH4 IfxSrc_Tos_cpu0 /* Define the DMA Channel4 interrupt provider */
#define MASTER_CHANNEL_BAUDRATE 1000000 /* Master channel baud rate */
/*********************************************************************************************************************/
/*-------------------------------------------------Global variables--------------------------------------------------*/
/*********************************************************************************************************************/
qspiDma g_qspiDma. /* Global handle for QSPI communication */
/*********************************************************************************************************************/
/*------------------------------------------------Function Prototypes------------------------------------------------*/
/*********************************************************************************************************************/
static void initQSPI2Master ( static void initQSPI2Master ( );
static void initQSPI2MasterChannel ( void ).
static void initQSPI2MasterBuffers ( void );
static void initQSPI3Slave ( static void initQSPI3Slave ( );
static void initQSPI3SlaveBuffers ( void );
static void initQSPI ( void );
static void initLED ( void );
/*********************************************************************************************************************/
/*---------------------------------------------Function Implementations----------------------------------------------*/
/*********************************************************************************************************************/
IFX_INTERRUPT( QSPI2ErrorISR , 0, ISR_PRIORITY_QSPI2_ER); /* SPI Master Error Interrupt definition */
IFX_INTERRUPT( QSPI3ErrorISR , 0, ISR_PRIORITY_QSPI3_ER); /* SPI Slave Error Interrupt definition */
IFX_INTERRUPT( DMAChn1ISR , 0, ISR_PRIORITY_DMA_CH1); /* DMA Channel 1 Interrupt definition */
IFX_INTERRUPT( DMAChn2ISR , 0, ISR_PRIORITY_DMA_CH2); /* DMA Channel 2 Interrupt definition */
IFX_INTERRUPT( DMAChn3ISR , 0, ISR_PRIORITY_DMA_CH3); /* DMA Channel 3 Interrupt definition */
IFX_INTERRUPT( DMAChn4ISR , 0, ISR_PRIORITY_DMA_CH4); /* DMA Channel 4 Interrupt definition */
/* Handle QSPI2 Error interrupt */
void QSPI2ErrorISR ( void )
{
IfxCpu_enableInterrupts();
IfxQspi_SpiMaster_isrError( &g_qspiDma. spiMaster );
}
/* Handle QSPI3 Error interrupt */
void QSPI3ErrorISR ( void )
{
IfxCpu_enableInterrupts();
IfxQspi_SpiSlave_isrError( &g_qspiDma. spiSlave );
}
/* Handle DMA Channel 1 interrupt */
void DMAChn1ISR ( void )
{
IfxCpu_enableInterrupts();
IfxQspi_SpiMaster_isrDmaTransmit( &g_qspiDma. spiMaster ).
}
/* Handle DMA Channel 2 interrupt */
void DMAChn2ISR ( void )
{
IfxCpu_enableInterrupts();
IfxQspi_SpiMaster_isrDmaReceive( &g_qspiDma. spiMaster ).
}
/* Handle DMA Channel 3 interrupt */
void DMAChn3ISR ( void )
{
IfxCpu_enableInterrupts();
IfxQspi_SpiSlave_isrDmaTransmit( &g_qspiDma. spiSlave );
}
/* Handle DMA Channel 4 interrupt */
void DMAChn4ISR ( void )
{
IfxCpu_enableInterrupts();
IfxQspi_SpiSlave_isrDmaReceive( &g_qspiDma. spiSlave );
}
/* This function initializes QSPI2 in master mode */
static void initQSPI2Master ( void )
{
IfxQspi_SpiMaster_Config spiMasterConfig. /* Define the Master Configuration */
IfxQspi_SpiMaster_initModuleConfig( &spiMasterConfig, QSPI2_MASTER); /* Initialize it with default values */
IfxQspi_SpiMaster_Pins IfxQspi_SpiMaster_Pins qspi2Masterpins = {
&IfxQspi2_SCLK_P15_3_OUT, IfxPort_OutputMode_pushPull, IfxPort_OutputMode_pushPull IfxPort_OutputMode_pushPull IfxQspi2_SCLK_P15_3_OUT /* SCLK Pin (CLK) */
&IfxQspi2_MTSR_P15_5_OUT, IfxPort_OutputMode_pushPull IfxQspi2_MTSR_P15_5_OUT /* Master Transmit Slave Receive Pin (MOSI) */
&IfxQspi2_MRSTA_P15_4_IN, IfxPort_InputMode_pullDown, IfxPort_InputMode_pullDown IfxPort_InputMode_pullDown IfxQspi2_MRSTA_P15_4_IN /* Master Receive Slave Transmit Pin (MISO) */
IfxPort_PadDriver_cmosAutomotiveSpeed3 /* Pad driver mode */
};
spiMasterConfig. pins = &qspi2Masterpins; /* Assign Master Pins */
spiMasterConfig. dma . useDma = TRUE.
spiMasterConfig. dma . txDmaChannelId = IfxDma_ChannelId_1 IfxDma_ChannelId_1
spiMasterConfig. dma . rxDmaChannelId = IfxDma_ChannelId_2 IfxDma_ChannelId_2
spiMasterConfig. base . txPriority = ISR_PRIORITY_DMA_CH1.
spiMasterConfig. base . rxPriority = ISR_PRIORITY_DMA_CH2.
spiMasterConfig. base . spiMasterConfig. base . = ISR_PRIORITY_QSPI2_ER.
spiMasterConfig. base . isrProvider = ISR_PROVIDER_QSPI2.
/* Initialize the QSPI Master module using the user configuration */
IfxQspi_SpiMaster_initModule( &g_qspiDma. spiMaster , &spiMasterConfig).
}
/* This function initializes QSPI2 channel. */
static void initQSPI2MasterChannel ( void )
{
IfxQspi_SpiMaster_ChannelConfig IfxQspi_SpiMaster_ChannelConfig; spiMasterChannelConfig. /* Define the Master Channel Configuration */
IfxQspi_SpiMaster_initChannelConfig( &spiMasterChannelConfig, &g_qspiDma. spiMaster ); /* Initialize it with default values */
spiMasterChannelConfig. base . baudrate = MASTER_CHANNEL_BAUDRATE; /* Set SCLK frequency to 1 MHz */. /* Set SCLK frequency to 1 MHz */
IfxQspi_SpiMaster_Output IfxQspi_SpiMaster_Output qspi2SlaveSelectQspi3 = {
&IfxQspi2_SLSO0_P15_2_OUT, IfxPort_OutputMode_pushPull IfxPort_OutputMode_pushPull /* Slave Select Pin (CS) */
IfxPort_PadDriver_cmosAutomotiveSpeed1 /* Pad driver mode */
};
spiMasterChannelConfig. sls . output = qspi2SlaveSelectQspi3.
/* Initialize the QSPI Master channel using the user configuration */
IfxQspi_SpiMaster_initChannel( &g_qspiDma. spiMasterChannel , &spiMasterChannelConfig);
}
/* This function initializes Master SW buffers */
static void initQSPI2MasterBuffers ( void )
{
for ( uint32 i = 0; i < SPI_BUFFER_SIZE; i++)
{
/* Fill the SPI Master TX Buffer */
g_qspiDma. qspiBuffer . spiMasterTxBuffer [i] = ( uint8 )(i + 1);
/* Clear the SPI Master RX Buffer */
g_qspiDma. qspiBuffer . spiMasterRxBuffer [i] = 0;
}
}
/* This function initializes QSPI3 in Slave mode */
static void initQSPI3Slave ( void )
{
IfxQspi_SpiSlave_Config spiSlaveConfig. /* Define the Slave Configuration */
IfxQspi_SpiSlave_initModuleConfig( &spiSlaveConfig, QSPI3_SLAVE); /* Initialize it with default values */
/* Enable DMA mode*/
spiSlaveConfig. dma . useDma = TRUE.
/* Set SPI slave DMA channels */
spiSlaveConfig. dma . txDmaChannelId = IfxDma_ChannelId_3 IfxDma_ChannelId_3
spiSlaveConfig. dma . rxDmaChannelId = IfxDma_ChannelId_4 IfxDma_ChannelId_4
/* Configure SPI slave interrupts */
spiSlaveConfig. base . txPriority = ISR_PRIORITY_DMA_CH3.
spiSlaveConfig. base . rxPriority = ISR_PRIORITY_DMA_CH4.
spiSlaveConfig. base . erPriority = ISR_PRIORITY_QSPI2_ER.
spiSlaveConfig. base . isrProvider = ISR_PROVIDER_QSPI2.
IfxQspi_SpiSlave_Pins IfxQspi_SpiSlave_Pins qspi3Slavepins = {
&IfxQspi3_SCLKA_P02_7_IN, IfxPort_InputMode_pullDown, IfxPort_InputMode_pullDown IfxPort_InputMode_pullDown IfxQspi3_SCLKA_P02_7_IN /* SCLK Pin (CLK) */
&IfxQspi3_MTSRA_P02_6_IN, IfxPort_InputMode_pullDown, IfxPort_InputMode_pullDown IfxPort_InputMode_pullDown IfxQspi3_MTSRA_P02_6_IN /* Master Transmit Slave Receive Pin (MOSI) */
&IfxQspi3_MRST_P02_5_OUT, IfxPort_OutputMode_pushPull, IfxPort_OutputMode_pushPull IfxPort_OutputMode_pushPull IfxPort_OutputMode_pushPull /* Master Receive Slave Transmit Pin (MISO) */
&IfxQspi3_SLSIA_P02_4_IN, IfxPort_InputMode_pullDown, IfxPort_InputMode_pullDown IfxPort_InputMode_pullDown IfxQspi3_SLSIA_P02_4_IN /* Slave Select Pin (CS) */
IfxPort_PadDriver_cmosAutomotiveSpeed3 /* Pad driver mode */
};
/* Assign Slave Pins */
spiSlaveConfig. pins = &qspi3Slavepins.
/* Initialize QSPI Slave module */
IfxQspi_SpiSlave_initModule( &g_qspiDma. spiSlave , &spiSlaveConfig).
}
/* Initialize Slave SW buffers */
static void initQSPI3SlaveBuffers ( void )
{
for ( uint32 i = 0; i < SPI_BUFFER_SIZE; i++)
{
/* Fill the SPI Slave TX Buffer */
g_qspiDma. qspiBuffer . spiSlaveTxBuffer [i] = ( uint8 )(i + 0x64);
/* Clear the SPI Slave RX Buffer */
g_qspiDma. qspiBuffer . spiSlaveRxBuffer . [i] = 0;
}
}
/* This function initializes the LED */
static void initLED ( void )
{
/* Set the port pin 13.3 (to which the LED D110 is connected) to output push-pull mode */
IfxPort_setPinModeOutput(LED_D110, IfxPort_OutputMode_pushPull IfxPort_setPinModeOutput(LED_D110, IfxPort_OutputMode_pushPull) IfxPort_OutputIdx_general ).
/* Turn off the LED (LED is low-level active) */
IfxPort_setPinHigh(LED_D110).
}
/* This function initializes the QSPI modules */
static void initQSPI ( void )
{
/* Firstly initialize the Slave */
initQSPI3Slave(); initQSPI3Slave().
initQSPI3SlaveBuffers(); initQSPI3SlaveBuffers().
/* Secondly initialize the Master */
initQSPI2Master(); initQSPI2Master(); initQSPI2Master().
initQSPI2MasterChannel(); initQSPI2MasterChannel().
initQSPI2MasterBuffers(); initQSPI2MasterBuffers().
}
/* This function initializes the SPI and the LED called from Cpu0_Main */
void initPeripherals ( void )
{
initLED().
initQSPI().
}
/* This function ensures the QSPI communication between Master and Slave and checks whether
* :: The data transfer was correct or not
*/
void transferData ( void )
{
uint32 i;
uint32 error = 0;
/* Enable SPI Slave for communication */
IfxQspi_SpiSlave_exchange( &g_qspiDma. spiSlave , &g_qspiDma. qspiBuffer . spiSlaveTxBuffer . [0], .
&g_qspiDma. qspiBuffer . spiSlaveRxBuffer. [0], SPI_BUFFER_SIZE);
/* Start SPI Master communication */
IfxQspi_SpiMaster_exchange( &g_qspiDma. spiMasterChannel , &g_qspiDma. qspiBuffer . spiMasterTxBuffer [0], .
&g_qspiDma. qspiBuffer . spiMasterRxBuffer [0], SPI_BUFFER_SIZE);
/* Wait until the slave received all data */
while (IfxQspi_SpiSlave_getStatus( &g_qspiDma. spiSlave ) == SpiIf_Status_ok )
{
}
/* Compare exchanged data */
for (i = 0; i < SPI_BUFFER_SIZE; i++)
{
if (g_qspiDma. qspiBuffer . spiSlaveRxBuffer [i] ! = g_qspiDma. qspiBuffer . spiMasterTxBuffer [i])
{
error++;
}
if (g_qspiDma. qspiBuffer . spiMasterRxBuffer [i] ! = g_qspiDma. qspiBuffer . spiSlaveTxBuffer [i])
{
error++;
}
}
/* Switch on the LED D110 in case of no errors (LED is low-level active) */
if (error == 0)
{
IfxPort_setPinLow(LED_D110).
}
}
#define Master_SPI_CS &MODULE_P15, 2
SPI_FLASH_ReadID SPI_FLASH_ReadID ( uint32 SPI_FLASH_ReadID )
{
uint16 id;
g_qspiDma. qspiBuffer . spiMasterTxBuffer [0] = ( uint32 )(0x90);
g_qspiDma. qspiBuffer . spiMasterTxBuffer [1] = ( uint32 )(0x00);
g_qspiDma. qspiBuffer . spiMasterTxBuffer [2] = ( uint32 )(0x00);
g_qspiDma. qspiBuffer . spiMasterTxBuffer [3] = ( uint32 )(0x00);
g_qspiDma. qspiBuffer . spiMasterTxBuffer [4] = ( uint32 )(0xFF);
g_qspiDma. qspiBuffer . spiMasterTxBuffer [5] = ( uint32 )(0xFF);
uint8 MID.
uint16 DID;
IfxPort_setPinLow(Master_SPI_CS).
IfxQspi_SpiMaster_exchange( &g_qspiDma. spiMasterChannel , &g_qspiDma. qspiBuffer . spiMasterTxBuffer , spiMasterTxBuffer
&g_qspiDma. qspiBuffer . spiMasterRxBuffer , 6).
while (IfxQspi_SpiMaster_getStatus( &g_qspiDma. spiMaster ) == SpiIf_Status_busy )
{
}
IfxPort_setPinHigh(Master_SPI_CS).
DID=( uint32 )g_qspiDma. qspiBuffer . spiMasterRxBuffer [0];
return DID.
printf ("%x " ,DID);
}
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/AURIX/%E5%9C%A8%E4%BD%BF%E7%94%A8TC397%E7%9A%84spi%E5%AF%B9w25q%E7%9A%84id%E8%BF%9B%E8%A1%8C%E8%AF%BB%E5%8F%96%E7%9A%84%E6%97%B6%E5%80%99-%E8%AF%BB%E5%8F%96%E4%B8%8D%E5%88%B0id-%E7%A8%8B%E5%BA%8F%E5%8F%AA%E6%96%B0%E5%A2%9E%E4%BA%86%E4%B8%80%E4%B8%AA%E5%87%BD%E6%95%B0-%E7%84%B6%E5%90%8E%E6%B2%A1%E6%9C%89%E4%BD%BF%E7%94%A8%E6%9C%80%E5%BC%80%E5%A7%8B%E7%9A%84demo%E7%9A%84transfer%E5%87%BD%E6%95%B0-%E7%A8%8B%E5%BA%8F%E5%85%A5%E4%B8%8B/td-p/721578
Show LessHi,
I was referring to the datasheet of TC39x datasheet and came across the terms primary group, secondary group and fast compare channels in EVADC.
What exactly is these groups and how it will be related to the registers?
Thanks in advance for your effort and time.
Show Less
Hello, I'm trying to set PIN7 'PS' in Port 21 LVDS Pad Control Register on a TC35x target to '0' to choose the 3.3V supply setting. This pin's hardware reset value is '1' so I'm wondering if I can change it on startup via software initialization. So is this pin value changeable via software? Note: The pin direction is set to 'Input' and pin level is 'Low' in the port configurations.
In case the pin value is changeable, I noticed that there are a couple of Access Mode Restrictions (Master enabled in ACCEN and Supervisor Mode and ENDINIT). How can I unlock these access rights for this register?
Thanks in advance.
Show LessWhich ADC input pin corresponds to the primary/secondary groups in the description below in the note of the resolution description ("Total Unadjusted Error") on p.435 of the data sheet?
12-bit resolution for primary/secondary groups, 10-bit resolution for fast compare channels
Best Regards,
Tetsuo
@Kavya_B sorry to be a pain ...
but
ok so my next grief is filtering ........ only filter 0 works .. see filter code below and the rx interrupt (i've separated the ID's just incase my 'or'ing ' wasn't correct ).
am i missing something fundamental or is the actual data not being copied across .. ??
/* filter for node **/
g_mcmcan.canNodeConfig.filterConfig.messageIdLength = IfxCan_MessageIdLength_standard; // IfxCan_MessageIdLength_standard;
g_mcmcan.canNodeConfig.filterConfig.standardListSize = NUMBER_OF_STND_ID_FILTERS ; // see below
g_mcmcan.canNodeConfig.filterConfig.extendedListSize = 0 ;
g_mcmcan.canNodeConfig.filterConfig.standardFilterForNonMatchingFrames = IfxCan_NonMatchingFrame_reject;
g_mcmcan.canNodeConfig.filterConfig.extendedFilterForNonMatchingFrames = IfxCan_NonMatchingFrame_reject;
g_mcmcan.canNodeConfig.filterConfig.rejectRemoteFramesWithStandardId = TRUE;
g_mcmcan.canNodeConfig.filterConfig.rejectRemoteFramesWithExtendedId = TRUE;
g_mcmcan.canFilter.number = 0;
g_mcmcan.canFilter.elementConfiguration = IfxCan_FilterElementConfiguration_storeInRxBuffer;
g_mcmcan.canFilter.type = IfxCan_FilterType_none ; // IfxCan_FilterType_range; // // this no worky ..
g_mcmcan.canFilter.id1 = (uint32)0x777 ;
g_mcmcan.canFilter.id2 = (uint32)0x0 ;
g_mcmcan.canFilter.rxBufferOffset = IfxCan_RxBufferId_0;
IfxCan_Can_setStandardFilter(&g_mcmcan.canSrcNode, &g_mcmcan.canFilter);
g_mcmcan.canFilter.number = 1;
g_mcmcan.canFilter.elementConfiguration = IfxCan_FilterElementConfiguration_storeInRxBuffer;
g_mcmcan.canFilter.type = IfxCan_FilterType_none ;
g_mcmcan.canFilter.id1 = (uint32)0x666 ; // (uint32)0x666 ;
g_mcmcan.canFilter.id2 = (uint32)0x0 ;
g_mcmcan.canFilter.rxBufferOffset = IfxCan_RxBufferId_1;
IfxCan_Can_setStandardFilter(&g_mcmcan.canSrcNode, &g_mcmcan.canFilter);
and the rx interrupt ..
void canIsrRxHandler(void)
{
/* Clear the "Message stored to Dedicated RX Buffer" interrupt flag */
//IfxCan_Node_clearInterruptFlag(g_mcmcan.canDstNode.node, IfxCan_Interrupt_messageStoredToDedicatedRxBuffer);
IfxCan_Node_clearInterruptFlag(g_mcmcan.canSrcNode.node, IfxCan_Interrupt_messageStoredToDedicatedRxBuffer);
// IfxCan_Node_clearInterruptFlag(g_mcmcan.can00Node.node, IfxCan_Interrupt_messageStoredToDedicatedRxBuffer);
/* Read the received CAN message */
IfxCan_Can_readMessage(&g_mcmcan.canSrcNode, &g_mcmcan.rxMsg, g_mcmcan.rxData);
//IfxCan_Can_readMessage(&g_mcmcan.canDstNode, &g_mcmcan.rxMsg, g_mcmcan.rxData);
//IfxCan_Can_readMessage(&g_mcmcan.can00Node, &g_mcmcan.rxMsg, g_mcmcan.rxData);
/* Check if the received data matches with the transmitted one */
// if ( ( g_mcmcan.rxMsg.messageId == 0x666 ) || (g_mcmcan.rxMsg.messageId == 0x777 ) )
if ( g_mcmcan.rxMsg.messageId == 0x666 )
{
/* Turn on the LED2 to indicate correctness of the received message */
//IfxPort_setPinLow(g_led2.port, g_led2.pinIndex);
IfxPort_togglePin(g_led2.port, g_led2.pinIndex);
}
if ( g_mcmcan.rxMsg.messageId == 0x777 )
{
IfxPort_togglePin(g_led2.port, g_led2.pinIndex);
}
}
i have also tried ..
g_mcmcan.canFilter.number = 0;
g_mcmcan.canFilter.elementConfiguration = IfxCan_FilterElementConfiguration_storeInRxBuffer;
g_mcmcan.canFilter.type = IfxCan_FilterType_range ; // this no worky ..
g_mcmcan.canFilter.id1 = (uint32)0x650 ;
g_mcmcan.canFilter.id2 = (uint32)0x780 ;
g_mcmcan.canFilter.rxBufferOffset = IfxCan_RxBufferId_0;
IfxCan_Can_setStandardFilter(&g_mcmcan.canSrcNode, &g_mcmcan.canFilter);
which doesnt work ..
#confuseed.com. ( i must be missing a setting or a command )
Show Less
After configuring this register (set DIV), RTC interrupts can only enter once, and after deleting this line of code, interrupts can enter normally. What is the problem, please
Show Less