AURIX™ Forum Discussions
Hi,
I am working with the TC334LP32F200FAAKXUMA1 microcontroller. How can we implement I2C for this controller? Since there is no physical I2C hardware available, can we implement software I2C? Could you please share sample code for I2C?
Thanks in advance.
Show LessHello,
I would like to know
1) Whether FreeRTOS support available for TC37x or TC38x?
2) If yes, whether SMP support is there? Need to run one instance of FreeRTOs in every core.
Show LessHello,
We are using the TC377 secure gateway microcontroller, and we are trying for transmission and reception of CAN data. We can transmit the data from the controller to the desktop but not from the desktop to the controller.
So, I have a query does our Infineon microcontroller support CAN LAWICEL USB?
Thanks in advance,
Nikhil.
Show LessHello,
I have some questions regarding OCDS
1 - I understood that the Debug System is disable by default and in case I enable it, it is mandatory to insert a password, is that correct ?
2 - The password mentioned is it valid ony for debug puposes or also blocked me to reflash the uC ? I meant I CANNOT flash a firmware again in case I lost the password ? If I lost the password the uC is bricked ?
3 - I understood that the advantage of BROM and flash OTP is that is those are the only way to prevent my code to be ovewriten, for instance a critical part of my boot, is that correct ?
Thank you so much in advanced,
Antonio
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Hi there,
I'm trying to implement a number of functions as __syscallfunc() traps but I am unsure how flexible this system is with regards to functions with different numbers and types of parameters.
Taken from the TASKING User Guide:
#pragma alias syscall_a=trap6
#pragma alias syscall_b=trap6
__syscallfunc(1) int syscall_a( int, int );
__syscallfunc(2) int syscall_b( int, int );
int x;
void main( void )
{
x = syscall_a(1,2); // causes a trap class 6 with TIN = 1
x = syscall_b(4,3); // causes a trap class 6 with TIN = 2
}
int __trap( 6 ) trap6( int a, int b ) // trap class 6 handler
{
// switch statement on TIN
}
Here, trap6() acts as the syscall receiver where we can perform different actions depending on the TIN that was raised along with the sys call - as well as the parameters themselves. However, it seems forced that the function that raises the syscall must take 2 integer parameters and return 1 integer. But what i would like to do is something like this:
#pragma alias syscall_a = trap6
#pragma alias syscall_b =trap6
__syscallfunc( 1 ) int syscall_a( int );
__syscallfunc( 2 ) void syscall_b( int, void *, int );
Where I can pick up a different type and number of parameters in trap6() depending on the TIN. Potentially i could have both functions as syscall_x( void*, void*, void* ) and cast the types inside trap6(), but this would require me calling each function with 3 parameters each time - syscall_a() would need to be rewritten to accept 3 parameters for example.
Is there any solution to this?
Many thanks
Show LessDear Community,
I use the program example SPI_CPU_1_KIT_TC397_TFT. What functions are used to generate or send the SLCK, Chip Selec and Mosi?
best regards,
Patrick
Show LessHello,
During debugging with TC39 controller, we observed an issue during start-up. Flashed software starts the ECU with the intended PC address using Trace32, but reboots or power cycles lead to an unpredictable startup address within the BMIField, causing program execution failures. could any one support here ?
Show LessHello,
I am trying to develop standalone project for DSADC module in Aurix Development studio. I want to enble clock for module for which I am implementing following method :
CONVCTRL_CLC.U = 0x00000000; // enable module clocks
while ((CONVCTRL_CLC.U & 0x00000002) == 2); // wait until module is enabled
//----- Bus Peripheral Interface: reset kernel0/1
CONVCTRL_KRST0.B.RST = 0x1; // reset kernel0
CONVCTRL_KRST1.B.RST = 0x1; // reset kernel1
while (!CONVCTRL_KRST0.B.RSTSTAT); // wait until reset is performed
CONVCTRL_KRSTCLR.B.CLR = 0x1; // clear kernel reset status bit
CONVCTRL_CCCTRL.B.TC = 0xB; // Access to Converter Control registers is enabled
//----- set ADC phase synchronization
CONVCTRL_PHSCFG.U = 0x00008007; //phase synchronization signal is generated at fadc / 8
//----- enable DSADC -----------------------------------------------------------------------------
-EDSADC_CLC.U = 0; // load clock control register
while ((EDSADC_CLC.U & 0x00000002) == 2); // wait until module is enabled
// reset module
EDSADC_KRST0.U = 1;
EDSADC_KRST1.U = 1;
while (EDSADC_KRST0.U != 0x2);
// clear the set reset flag
EDSADC_KRSTCLR.U = 1;
But I am not able to observe above configuration in Aurix Debugger window. What could be issue ? How it can be resolved.
It will appreciable to get quick response for this issue.
Thanks and regards.
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