AURIX™ Forum Discussions
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question: there is 3.3v DC votlage in capture function pin B12, P13.0 in TC387 with BGA292. normally, it should be 0v.
what we did:
1. whatever we set this pin register "no pull", "pull down", it doesn't work.
2. we have tried to disconnect all component form this pin. we will still see this DC votalge in this pin.
do anyone have this issue before and provide solution or suggestion?
thank you!
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hello infineon
I meet a System Bus and Peripheral Errors DAE - Data Access Asynchronous Error (TIN 3) trap on tc322
DATR reg value is :0x00000008
DSTR reg value is :0x00000004
the DEADD register value is 0xAF000200 a DFLASH address
I have two question:
1. trap is a Store data type ,but why the DSTR register load operation error is 1???
2. This trap is Data Access Asynchronous error, how to understand the Asynchronous? Is the PC address recorded in callstack when the trap raised is not the real PC address that which caused the trap.
3.when trap raised , I read the callstack found The instruction executed by pc is read a Dflash address but why this operation raised a trap???
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Hardware: TC364
Software (iLLD for QSPI and DMA drivers)
Target: I want to sending 3x 8bit message in a roll through QSPI+DMA but without triggering any CPU interrupt
here is my configuration
the thing is, when I start using the function from iLLD (see below)
IfxQspi_SpiMaster_exchange(&sQspiMaster_Channel_Handle, src, dest, count);
my transmission always stopped after 2nd payload is transfered, the 3rd payload is always missing, it just look like the SPI transferring will never be finished
but once if I change the isrProvider like
I can send the 3 payload in a roll successfully by using software interrupt routine
but this is not what I want, I need to implement a mechanism that sending the payload without interrupting the CPU
can anyone help me out of this problem?
1. do I configure correctly or I forget some crusial points
2. is there any Infineon Example code can realize the function which I am looking for (SPI + DMA transferring without triggering CPU interrupt)
thanks
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https://github.com/Infineon/AURIX_code_examples/tree/master/code_examples/MULTICAN_1_KIT_TC297_TFT
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please ignore this question. problem is addressed Show Less
Hello Infineon Team,
We are currently planning to migrate MCAL. certain modules are not able to generate Please give your feedback as early as possible to fix this generation issue for the modules .
Kindly let me know if any additional details are needed.
Note: I have valid EB license and can generate all modules related to MCAL-2.10 plugins properly.
Show LessHello,
Could you please provide my this video Getting Started for TC3xx MCAL Integration.mp4
thanks a lot in advance.
Best Regards
Houssemeddine
Show LessDear Experts
as you can see in the picture,when i use the instruction(MOVH & ADDI) on the left side to assign __RAM0_SIZE(0x000276A0) to D15 register,there is no problem,but when i use the instruction(MOV.U & ADDIH)on the right to assign this value,the system run into a trap(CLASS 3 TIN4)
what's the difference between these two instruction?thanks!
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Please ask: https: //www.infineon.com/cms/en/tools/aurix-embedded-sw/AUTOSAR/Infineon/ MCAL dirvers
In the list, isn't the one marked by the red box understood to mean that there is no security certification for this part?
Thank you!
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/AURIX/TC397-%E5%85%B3%E4%BA%8E-CAN-I2C-safty-claim-%E9%97%AE%E9%A2%98/td-p/709500
Show LessHello,
Whether TSIM supports TC3xx series to debug application without hardware, If yes then whether AURIX TC3xx - Free Entry Tool Chain is helpful to achieve mentioned purpose?
Thanks!
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