AURIX™ Forum Discussions
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I need a phase delay of some nano seconds between two pulses of the top legs.I am using aurix 233 and using TOM module.Even though i am getting perfect inverter pulses with deadtime for pulses of opposite leg i am not able to achieve phase delay between same top or bottom legs.
I used the function below
waitTime(IfxStm_getTicksFromMilliseconds(BSP_DEFAULT_TIMER, WAIT_TIME));
but its not working for me.Can i get some help regarding this?
Show LessHow to get source code for AURIX TC3xx Motor Control Application Kit, please provide me the download link
After I transferred the PF0 program to SRAM to run, then executed [Erase Logical Sector Range] in sequence.
It work well, HF_ERRSR did not report an error, and HF_OPERATION also passed, no busy.
But when I check memory dump by TASKING, it is true that almost all the data is displayed as "0", but there are a few bits that are "1".
I thought it was due to bad memory or unstable current and voltage. So I repeated the test several times and changed the Triboard, but the result remained the same, it could not be erased to "0" in several fixed address.
I took a screenshot of part of it.
[Erase Logical Sector Range] can be that all PF fields become 0, is my understanding wrong?
Thank you for watching.
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Hi,
I'm trying to set the ERRDIS bit in DAM's Memcon register of Infineon AURIX TC39x controller, but when the debugger executes that line, it gets stuck. I have cleared end initialization bit before I try to write.
I'm also setting ERRDIS bit of LMU's Memcon register, I'm able to write to it once I clear the end initialization bit , but the same isn't working with DAM's Memcon. Could anyone help me with this? I'm not sure what I'm missing here.
Thank you!
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Dear experts:
The description about “Time Check Password” as follow:
If time checking is enabled (WDTxSR.TCS=1) the REL field of the WDTxCON0 register must be written with an
inverted (bit flipped) estimate of the current WDT count value. The acceptable margin of error of this estimate (in
WDT clock periods) is specified by the value of WDTxSR.TCT. If the written estimate is outside the range
WDTxSR.TIM +/- WDTxSR.TCT, then an SMU alarm condition is indicated. This mechanism can provide a check of
the elapsed program execution time since the last WDT restart. Note that a Time Check comparison is still
required for a Password or Check Access while the WDT is operating in Time-Out mode (e.g. After accessing
ENDINIT-protected registers).
According to the above description:whether REL should be computed as such?
For example:WDTxSR.TCS=1 ,and current WDT count value = 0xFF0F;WDTxSR.TCT = 0xF
step1:Calculate inverted estimate value according to WDT count value : estimate value=0x00FF;
step2: Calculate WDTxSR.TIM +/- WDTxSR.TCT: 0xFF00 ~ 0xFF1E
step3: write estimate value to REL. But the estimate value(0x00FF) is always out off the range 0xFF00 ~ 0xFF1E,so how to correctly use "Time Check Password" to implement "Password Access to WDTxCON0".
Is the above example correct? If not, could you provide the correct example or code?
Looking forward your reply.
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History. 2019/02/12: Added the support for 64bit CRC calculation and for binary string input. 2016/11/11: Added the option to print the CRC lookup table 'reversed'.
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- BLKM = 4
- Transaction length = 0 i.e One transfer ( compressing 4 moves ) is One transaction
- No byte swapping and
- crc initial value is zero
Figure 1 : Debugger capture of DMA data transfer and checksum captured at end of DMA transfer
Input data with additional padding | Input data with no padding |
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CRC matches the calculated CRC from FCE as in Figure 1 | CRC does not match with the calculated CRC from FCE |
Hi guys,
I want to print out uart logs for debug in critical section; but I found that the uart output is abnormal, and the system hang.
portENTER_CRITICAL();
Ifx_print("test in cs\n");
portEXIT_CRITICAL();
Now in the aurix code example, the uart print relies on the interrupt.
Does the uart print in TC39x can work well in critical seciton or interrupt disabled?
Do you have any method for uart print which not relis on the interrupt?
Show LessHi,
I am currently trying to provoke an application reset on core0 of TC367D using the IfxScuRcu_performReset(IfxScuRcu_ResetType_application, (UINT16)0x0000); function (I also tried with the example code from the Gitlab, but the result is the same).
Whenever I do that, the microcontroller gets stuck afterwards (during the reset I guess). Is there any way to attach to the running target to see what is happening ?
Can you please tell me if there is anything else to be done (the watchdogs have been previously disabled) ? Is there any specific state in which the other core should be when reseting? Any lead can be helpful !
Thank you !
Show LessHello,
I am new to Infineon MCUs and would like some advice while getting started. My project is to control a PMSM with field oriented control. I am not sure yet if this will be sensored or sensorless. The MCU needs to be automotive grade. I am considering using the KITA2GTC334LITETOBO1 evaluation board to get started and am considering one of the low end Aurix MCUs (e.g., TC32x or TC33x). A few questions about getting started:
Is there any example field oriented control code provided for these Aurix MCUs?
Are the Aurix MCUs the best fit for automotive grade motor control applications? If not, what other Infineon MCUs would work well for this application?
Any other tips or advice for getting started with development would be greatly appreciated.
Thanks.
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