AURIX™ Forum Discussions

Hi, I started to work on basic set of configurations for Aurix TC277. I am using CCU6 to generate PWM for space vector modulation. I took demo software called CCU6_PWM_Generation_1_KIT_TC297_TFT and based on this software I made mine. Everything would work fine but I have noticed that dead time is not generated at all. I am guessing that it is not configured right. Where should I look for initial settings ...or any example to save some time on studying. Thank you in advance for any help with it. Good luck in your projects with Aurix chip! Robert

I got it resolved because it is very simple. There is one register to set one dead time value for all 3 legs of inverter at once. It needs to be set once after reset and it works fine ...I did not check whether it can be changed easily later ...but I guess it should be doable any time ...

Hello, 

I am using TC364 and getting OVC working for CAL data page overlay. Just using CPU0 at present

I configure a single OVC block to overlay PFLASH from Sector 8 with LMU RAM from Sector 9. 
Before the switch I write some data into the overlay RAM for a test. Then I switch on the overlay. RABRx.OVEN is clear but all other fields in RABRx OMASKx and OTARx are setup. OVCENABLE is already enabled for CPU0. OSEL.SHOVEN is set - ready to enable the OVC block. Then I write to OVCCON to switch on OVC. 
Then repeat reads from the PFLASH addresses and LMU RAM addresses.

The first read from PFLASH address range gets the value left in PFLASH. The second read and all further reads from PFLASH address range gets the value from LMU RAM as expected. 

I have tried using cached and non cached address ranges (0x8000 0000 or 0xA000 0000 for PFLASH and 0x9000 0000 or 0xB000 0000 for LMU RAM). I get the same result in both cases. 

If I add 2 dsyncs after the write to OVCCON to switch I get the expected data on the first read after the switch (value from RAM not PFLASH). Sometimes 1 dsync is enough, but not always !

Can anyone help me understand why the first data read is getting the value from PFLASH not the overlaid LMU RAM please.

Also for calibration data pages is it generally better to avoid cached areas ? 

I will try to read into Tricore cache coherency and have looked at other OVC related posts. 

Many thanks

Hi Everyone,

Following the ADS (AURIX Developer Studio). I have configured EDSADC (TC38A) in singled ended mode using P004 as input. And I tried to obtain the result, but output value (raw adc value) is always 0xFFEA ~ 0xFFE3 and it is not varying even if the input signal is varied.

Can you please check the attached EDSADC driver initialization/configuration, especially EDSADC Pin configuration (which is not present in ADS Documentation). And please give me your feedback whether the initialization/configuration is correct or not.

Thanks,

EthanHunt.