AURIX™ Forum Discussions
I am having a question on the placement of the AC coupling capacitors in the Tx and Clk. Where should these capacitors be placed? Near the Aurix side or the debug side? I am using TC397XX.
Please let me know if any schematics for the placement or any document concerning this exists.Show Less
SCRWKEN is set before entering Standby.
PMSWCR0_SCRWKEN = 0x1;
The SCR program is as follows.
-------------- omitted ----------------------
SCR_SCU_PAGE = 0;
if( SCR_SCU_SR == 0x08U )
SCR_SCU_PAGE = 1;
SCR_SCU_STDBYWKP = 0x1U;
SCR_SCU_PAGE = 0;
while( SCR_SCU_SR == 0x08U )
I thought that setting SCR_SCU_STDBYWKP to 1 would wake up the Tricore and start from the Reset address, but it doesn't wake up.
what am i doing wrong?Show Less
TC3xx - ESM[HW]:SYS:SW_ERROR_PIN_MONITOR indicates that the
A component independent from the AURIX microcontroller shall monitor the SW based External Failure Reporting Interface. The SW-based External Failure Reporting Interface provides a fast information about the presence of an internal failure of the microcontroller.
Can you please clarify what are the SW based External Failure Reporting Interfaces ?
Can you please give one example to help better understand this requirement ? I am having hard time trying to understand which interfaces should be used to satisfy this requirement.
I am trying to disable interrupt by using the tasking compiler attribute(__disable() and __enable()). But this does not seem to disable the interrupt. Is there a way through which I can disable interrupt by setting some registers?
I already looked into the target specification of TC3xx , and found that the register address for ICR is 1FE2C. But I did not find the full register layout of this register. I read in some paragraph that , to disable all the interrupts globally,
I should set the ICR.IE bit to '0'. But I did not find the register layout in the specification. Can someone please help me with this?
Bharath Show Less
I use the TC387 to test SRI Transaction ID Errors,but I do not know how to creat a "SRI Transaction ID Errors",please show me creating a SRI Masters Transaction ID Errors and SRI Slaves transaction ID Errors if you can .
Thank you very much and looking forward your reply.Show Less
I am not sure what that means "The MCI number is completely separate from the Master Tag(s) generated from the SRI Master connected to that MCI. However, the set of Master Tags presented by a specific MCI is fixed for a given device."
Could you help to make some additions and explanations?Show Less
When we reading the PMSWCR2 Register we got SCRINT Field value as 0x82 and some times value as 0x80.what is indicating with these values. When SCRINT value Will change 0x82 to 0x80?Show Less
Hi Infineon Expert:
We have use TC387 EVADC module for phase current sampling on FOC motor ECU. The ADC converter started by trigger signal from TOM module. The function of AD converter trigged by TOM channel worked correct. But the time gap from the trigger point to AD converter result interrupt nearly 4us. When we add one convert channel the time gap will increase nearly 3.5us, and the test result as shown below. We have two questions about the conversion.
1: How to reduce the time consumption about 4us for one channel convert. This is very important for FOC system.
2: In TC3xx user manual had describe the convert speed is 2.6M/S, but We had test when add one channel conversion, the consumption time will increase 3.5us. Why the conversion is so slowly and where did the time spend.
look for your reply!