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AURIX™ Forum Discussions

lior
AURIX™
hello , i am using tricore 377. when I work with QSPI module in slave mode and I would like to reset the tx fifo in the end of the stream.  i tried to... Show More
oneday
AURIX™
Dear experts:         I have a question about When does an Alarm status need to be cleared? For example,If the software alarm1 is configured as IRQ0, ... Show More
DevinHuang
AURIX™
請問TC297_TRB  板上CAN Transceiver(TLE6250),當與外接CAN Transceiver(TLE9250)正常連接,此時CAN Message 可正常傳送, 但當斷掉CAN 連接器後在重新連接上去(非bus off), 則CAN BUS 會BUSY 無法再送出CAN m... Show More
Lucie2512
AURIX™
Hallo an alle.Ich bin neu in der AURIX Entwickung und im Forum. Deshalb versuche mich langsam an Euch und an den Controller ranzutasten.Durch die mein... Show More
Mmmmmm
AURIX™
RAM init
solved msg Solved
can i know if ssh has been auto initialized by SSW or not from 0 to 95 ?  and which ssh is considered by PROCONRAM.RAMIN bit ? Show More
Ashwini
AURIX™
Job in SPI
solved msg Solved

Hello, I was wondering what is purpose of Job and Sequence in SPI ? how it will impact spi transmission and performance?

99bobby
AURIX™
symptom I would like to refer to the example code of TC397 (UART_DMA_TRASFER_1_KIT_TC397) for UART reception. The example code is triggered by DMA int... Show More
Vamshi_V
AURIX™
Hi everyone, I'm new to using Aurix tc39x microcontoller and can anyone please tell me how to switch supervisor mode to user mode in Aurix tc39x micro... Show More
abcmo123
AURIX™
Dear AURIX users , I can't understand the function of MTU_MEMMAP register Under what situation that we will use this register? Do I need to set the va... Show More
Dev
AURIX™
Hi All,   I have downloaded aurix development studio and done basic configurations as below Build Configuration→Set Active→External GCC - Debug. Prope... Show More
Forum Information

AURIX™

In this forum you can post your questions, comments and feedback about the 32-bit AURIX™ TriCore™ Microcontroller. The AURIX™ offers the highest scalability in performance, memory & peripherals across application. It is a safe and secure companion chip, meeting both the ISO functional safety standards and EVITA full security standards. Here you can also find the links to the latest board pages, SW and Tools GitHub, trainings, documents and FAQs