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AURIX™ Forum Discussions

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oneday
AURIX™
Dear experts: The  description about “Time Check Password” as follow:  If time checking is enabled (WDTxSR.TCS=1) the REL field of the WDTxCON0 regist... Show More
Kumaresh
AURIX™
Hi,   I was trying to calculate DMA CRC but the calculated CRC from FCE does not match with CRC in DMA register.  Could pls look into the below query ... Show More
Mmmmmm
AURIX™
How can i clear RESET STATUS BITS in RSTSTAT REG which it (rh) bits , and the only bits can i clear those which mentioned in photo Show More
Charlie9527
AURIX™
Hi guys, I want to print out uart logs for debug in critical section;  but  I found that the uart output is abnormal, and the system hang. portENT... Show More
Ana0211
AURIX™
Hi, I am currently trying to provoke an application reset on core0 of TC367D using the IfxScuRcu_performReset(IfxScuRcu_ResetType_application, (UINT16... Show More
rcollin
AURIX™
Hello, I am new to Infineon MCUs and would like some advice while getting started. My project is to control a PMSM with field oriented control. I am n... Show More
pistons7
AURIX™
Standby Mode is performed with TC3xx, and Wakeup is considered using CAN.Do I need to use SCR to wakeup? When CAN communication is detected by SCR, ho... Show More
Ana0211
AURIX™
Hello, I am currently trying to place some data at a precise address, that can be later on modified by erasing and writing the flash. After that, I wo... Show More
kjsmith
AURIX™
Hello,  I'm trying to do some performance measurements on functions and I'm getting results that I cannot explain. Most likely I am overlooking someth... Show More
toratora_th
AURIX™
I am trying to run "GethBasicDemo" in "iLLD_1_0_1_15_0_TC3xx_Drivers_And_Demos_Release" on TriBoard (TC397X).Channel 0 is working fine, but the receiv... Show More
Forum Information

AURIX™

In this forum you can post your questions, comments and feedback about the 32-bit AURIX™ TriCore™ Microcontroller. The AURIX™ offers the highest scalability in performance, memory & peripherals across application. It is a safe and secure companion chip, meeting both the ISO functional safety standards and EVITA full security standards. Here you can also find the links to the latest board pages, SW and Tools GitHub, trainings, documents and FAQs