AURIX™ Forum Discussions
Is it possible to configure ADS or ADS-limited to support OpenMP pragma for multi-core parallelization? Such as:
#pragma omp parallel for num_threads(omp_get_max_threads()) private(i)
How to configure WDT's alarm not to be associated with RT?
The configuration value of the RTAC0x register has other reference values, and currently only the default value is available in the manual.?
Show Less
Hello
I have to implement the diffrent SMBus command on the AURIX TC39B controller using it's I2C peripheral. does anyone can support me to get the sample code of the same. In SMbus the Repeated start condition is needed to generate at the end of Write command instead of Stop on I2C bus to continue to read the data from the slave. Will Appreciate the support.
Show LessDoes ACCEN Protection applicable for only PIN in port? or any other way to protect.
Example: Port 0, only P0.4 need to protect.
we are using TC367 on our project and want to know how to config MCS channel and ATOM on TC367's GTM module.
Thanks!
In the university my professor ordered 15-20 Aurix TFT Board and I got one to play as well. First of all I wasn't able to debug it powered from USB. (Windows installed Macbook pro 2013)
Anyways then I found and adapter and was able to debug. And as you can guess I have lost demo software. Demo software has many components and it looks really comprehensive application.
I wanted get the source code but couldn't find it anywhere. Can we get that demo app source code somehow? It is shown in the below link as well. Hope to hear good soon.
cheers,
https://www.youtube.com/watch?v=Z7l6b4VVC8M Show Less
I am willing to develop on TC233LP Evaluation Board, I am now in setting up SW.
I have successfully installed The Free TriCore Entry Tool Chain https://free-entry-toolchain.hightec-rt.com
But I can't find “SWFramework_3v1r0.zip” to download.
Could you help me please?
All Thanks
Badr Show Less
Hello,
Aurix dont jump after reset to the specified address configured in the BMI header.
The BMI header is valid, the mode selection for pins is disabled, start-up mode set to alternate boot mode (ABM), and all CRCs are calculated and valid.
Is there anything else missing to successfully change the start address ?
Show Less
This is Kalyan working in Elektrobit Automotive, we are currently Integrating the Microcontroller safety Library for ASIL B Certifications and we are using TC22x Controller
As a part of Integrating the Trap Test in the Microcontroller Test Library, the Test fails with the Error CODE
#define TRAPTST_SMU_ALMSTSERR (0x7020dU) , Upon further debugging the issue the Test Fails because of the SMU_ALARM_30 in SMU_ALARM_GROUP3
/* Shared Resource Interconnect, bus error SMU alarm */
#define SMU_SRIBUS_ERR_ALM ( (uint32)1U << SMU_ALARM_30 )
We are trying to figure out the Root causes for why the Particular Alarm is Raised, and there is no SRI BUS Error that is raised to Our understanding, Because of this Alarm Reported and the Test is moved to failure Test and we expect to do a reset.
Moreover this Alarm is Reported Occasionally and the there is no specific pattern we are observing the alarm.
so could you please let us know how the alarm is raised by HW ?? Please find the attached screen shots in the report about the issue.
Show Less