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AURIX™ Forum Discussions

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User19495
AURIX™
Hello,we are using the Aurix tc27x C-step controller for multiple projects. The newer D-step chips have better availability, therefore it would make s... Show More
User9635
AURIX™
Hello Support,Can you please tell me the reason and solution for the following SMU alarm?XBAR0 Bus Error Event -- ALM17[17] in Aurix 2G device.Best R... Show More
User9635
AURIX™
Hello Support,Can you please explain the meaning of this sentence as shown below from OCDS manual from end-user perspective?"The IOClienthowever has t... Show More
User9635
AURIX™
Hello Support,By default, OCDS is disabled for Aurix 2G when Debugger is not connected.Hence according to the User Manual, for Application Reset, ther... Show More
User9635
AURIX™
Hello Support,In the TC2xx Hardware Design Guide App Note :https://www.infineon.com/dgdl/Infineon-AP32469_TC2xx_hardware_design_guide-AN-v01_00-EN.pdf?fileId=5546d46269bda8df0169c9ee102823a9... Show More
User9635
AURIX™
Hello Support,In Aurix 2G, I want to connect the Debugger Probe physically to the Target ECU for Post-Mortem Debugging and then start the Debugger App... Show More
User19266
AURIX™
Hello, SW was working fine with the debugger connected. I flashed valid BMHD to let the ECU running without debugger. ECU startup without debugger onl... Show More
Anonymous
AURIX™
Hello, I tried to set BMHD0 and BMHD1 of Aurix TC23x. For this purpose I wrote Lauterbach Trace32 script; Set BMHD0Data.Set 0xA0000000++0x17 %Long 0x0... Show More
User9635
AURIX™
Hello Support,In the TC1.6,2 Manual, I found the following sentence : Figure 19 CSA and Processor SFR Updates on a Context Restore ProcessDoes the ... Show More
User13528
AURIX™
HII have a Hitex Tantino II debugger which I do not have a problem with, I also have a Lauterbach LA-3500 and a LA-7756 OCDS-Tricore I would like to t... Show More
Forum Information

AURIX™

In this forum you can post your questions, comments and feedback about the 32-bit AURIX™ TriCore™ Microcontroller. The AURIX™ offers the highest scalability in performance, memory & peripherals across application. It is a safe and secure companion chip, meeting both the ISO functional safety standards and EVITA full security standards. Here you can also find the links to the latest board pages, SW and Tools GitHub, trainings, documents and FAQs