AURIX™ Forum Discussions
Hi to all,
I tried to test the SMU alarm using the example https://github.com/Infineon/AURIX_code_examples/tree/master/code_examples/SMU_IR_Alarm_1_KIT_TC375_LK
It works fine with IfxSmu_Alarm_Software_Alarm0 but not when I change to IsxSmu_Alarm_DMA_Safety_FfUncorrectableErrorDetected the SSH generated DMA doesn't trigger the interrupt.
Can someone explain to me what's wrong here and share a fix code example?
For SSH generated alarm example https://github.com/Infineon/AURIX_code_examples/tree/master/code_examples/MTU_MBIST_1_KIT_TC375_LK have been used.
From the User manual:
13. Memory Test Unit (MTU) 13.1 Feature List Alarm notification to SMU: From each SRAM/SSH, 3 alarms are sent to the MTU, which are then forwarded to the SMU. These are the CE alarm, UCE alarm and ME alarm. |
How it should looks in the code ?
I am currently working on TC397 microcontroller. In the user manual 2 of the TC3xx microcontrollers section 38, for CAN interface, it describes if we want to dedicate a Rx and a Tx pin to each can node of each CAN module, there is a table (355) for that which suggests the possible pairs I can assign to the node. Can anyone tell me what are the differences between all of these possible pairs of Tx/Rx pins for each node? How would I know which pair is preferable?
Show LessHello Infineon Developer Community,
I'm currently working on a project involving the AURIX TC37x MCU and am looking to interface it with the TJA1103 100BASE-T1 PHY. I have a couple of questions:
- Can anyone provide guidance on which pins from the TC37x are suitable for this connection?
- Are there existing drivers available that support this PHY with the TC37x?
Any assistance or insights you can provide would be greatly appreciated. Thanks in advance!
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Dear Team,
Is there any source code for CANFD without any Loopback Enabled condition for TC377_SEC_GTW Board for reference?
Thanks,
Y.V.Akhil.
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1. I have recently purchased the KIT_A2G_TC375_5V_TRB_S, but I am encountering difficulty locating the example code that accompanies it. Could you kindly direct me to where I can access it?
2. I noticed that the TC375 datasheet available on the website is labeled as the "OPEN MARKET VERSION." If there exists a "FULL VERSION," I would greatly appreciate obtaining access to it.
If possible, I would also like to inquire about obtaining the MCAL.
I eagerly await your assistance in these matters.
Hi,
i'm trying to communiacte with a PMBus device via I2C. For that I need to generate a repeated Start between the address write and consecutive read. I'm using a TC387 with ILLD 1.14 and the following code:
IfxI2c_I2c_Config config;
IfxI2c_I2c_initConfig(&config, &MODULE_I2C0);
const IfxI2c_Pins pins = { &IfxI2c0_SCL_P15_4_INOUT,
&IfxI2c0_SDA_P15_5_INOUT,
IfxPort_PadDriver_cmosAutomotiveSpeed1 };
config.pins = &pins;
config.baudrate = 400000;
IfxI2c_I2c_initModule(&t->i2c, &config);
IfxI2c_I2c_deviceConfig i2cDeviceConfig;
IfxI2c_I2c_initDeviceConfig(
&i2cDeviceConfig,
&t->i2c); /* Device config for Bus of i2c handle */
i2cDeviceConfig.deviceAddress = addr;
i2cDeviceConfig.enableRepeatedStart=TRUE;
IfxI2c_I2c_initDevice(&t->i2cDev, &i2cDeviceConfig);
if (IfxI2c_I2c_write(&t->i2cDev, data, 1) != IfxI2c_I2c_Status_ok) {
return FALSE;
}
if (IfxI2c_I2c_read(&t->i2cDev, data, 1) != IfxI2c_I2c_Status_ok) {
return FALSE;
}
For non-PMBus devices this code works fine with enableRepeatedStart set to FALSE. When its set to TRUE the the program doesn't return from IfxI2c_I2c_write. It hangs in an endless loop at
if (!i2cDevice->enableRepeatedStart)
{
IfxI2c_releaseBus(i2c);
}
else
{
//wait until bus is free
while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
{}
IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
}
waiting for the transmission end interrupt.
After the write the SDA line stays high while SCL stays low
Any ideas?
Kind regards
Show LessHi ,
I have configure ADS for External GCC for build project , I am using Gcc compiler .
When I am building using this configuration , its giving error , I have attached error snaps, I checked with configuration and its default using "-mtc18" how we can changes it this configuration.
This configuration created for using same board with same chipset using default configuration.
Is there any other configuration issue ?
Thanks in advanced for your time.
Show LessHow do I get the Tasking tool chain to generate the assembly files? Or where does it hide them? Or how do I stop it from deleting them? Or, can I get it to generate the C and assembly code all mixed in together? Sorry, this ought to be easy but I am struggling.
Thank you.
Show LessI downloaded Infineon-TC37A_iLLD_UM_1_0_1_16_0-Software-v01_16-EN file from the website. But not sure how to use it . Double click the file, it seems it is just a help file.
Thanks.
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Hello
Currently we faced an issue that CPU is still around 95% after Memory is allocated near each CPU, Enable Pflash, using the compiler flags, it decreases CPU but still high with 95%
So I checked Frequency sys and found STM frequency is 100 MHZ and CPU for each core is 300 MHZ
Is it possible to make STM frequency to 300MHZ? will it decrease CPU load?
And if you have any suggestions to decrease CPU load please mention it ?
STMDIV [3:0] rw STM Divider Reload Value
The resulting STM frequency is configured to fSTM = fsource0 / STMDIV for the
allowed configurations. For STMDIV = 0000B the clock is shut off.
fsource0 could be configured either to fPLL0 (CLKSEL0 = 01B) or fBACK
(CLKSEL0 = 00B)
0000B fSTM is stopped
0001B fSTM = fsource0
0010B fSTM = fsource0/2
0011B fSTM = fsource0/3
0100B fSTM = fsource0/4
0101B fSTM = fsource0/5
0110B fSTM = fsource0/6
0111B Reserved, do not use this combination
1000B fSTM = fsource0/8
1001B Reserved, do not use this combination
1010B fSTM = fsource0/10
1011B Reserved, do not use this combination
1100B fSTM = fsource0/12
1101B Reserved, do not use this combination
1110B Reserved, do not use this
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